path delay 中文意思是什麼

path delay 解釋
路徑延遲
  • path : path(ol )=pathological; pathology n (pl paths )1 (自然踏成的)路;路徑;(馬路邊上的)人行...
  • delay : vt 延遲,拖延,耽擱。 We ll delay the party for two week 我們要把會期延遲兩周。 The train was del...
  1. A simple, robust method is proposed that relies on high - resolution measurements and on - line analysis of network traffic to provide real - time alarms in the incipient phase of network anomalies. the anomaly identification algorithms based on behavior model using path changes, flow shift and packet delay variance

    通過高性能測量和在線分析網路流和路由信息對初始網路異常產生實時報警,提出基於路由變化、流變化和包延遲建立網路行為模型的網路異常檢測演算法。
  2. With the three - dimensional ray - tracing program, the simulation of leo - gps occultation is given. the radio path of occultation observation is simulated, and then the excess phase delay is calculated. this work can be used for studying the effects of the neutral atmosphere and ionosphere on the occultation observations and evaluating the performance of the inversion techniques

    本文介紹了無線電掩星技術的發展狀況和基本原理,圍繞無線電掩星技術及其應用研究展開諸多研究和探討,主要工作內容如下: 1 、利用全球三維射線追蹤程序,開展leo - gps掩星觀測的模擬研究,以計算掩星觀測時電波傳播路徑、計算大氣引起的附加相位時延等。
  3. Another constrained problem is delay and delay variation constrained multicast routing problem. sp - dvma ( shortest path delay variation multicast algorithm ) algorithm based on minimum delay path is presented

    第二類是時延和時延差約束的多播路由問題,提出了以最短時延路徑為基礎的一種演算法? ? sp - dvma演算法。
  4. Analyze the critical path of the critical module, find out the most important signal that causes the delay of this timing path, try to modify the structure and improve the speed of the unit

    在md32的片上存儲系統設計中,進行了相應的低功氂設計考慮。由於md32採用了cache結構加片上ram組成面積較大的片上存儲系統,其功耗成為整塊晶元的最主要部分。
  5. After analyzing and comparing different partition rules, md32 pipeline architecture is finally defined, which meets the required instruction function, frequency and timing spec of md32. a complete set of creative design method for risc / dsp md32 micro - architecture is presented, such as parallel design, internal pipeline, central control, etc. thanks to the adoption of these design methodology, control path and data path are separated, circuit delay is reduced, and complex instruction operations are balanced among multiple pipeline stages

    它們將若干復雜指令操作均勻分配在幾個流水節拍內完成,實現了任意窗口尋址等復雜指令操作,將整個處理器的數據通路與控制通路分離,減小了電路時延,從而滿足了risc dsp不同指令功能和系統時鐘頻率的要求,構成了統一的、緊密聯系的、協調的md32系統結構。
  6. Traditional delay estimation based on ica requires the trail sequences to initialize the receiver, but the new algorithm based on ica does not need the trail sequences. it is based on the channel character of downlink, using the ica algorithm to estimate the multi - path mixture matrix, then, find the delay information which is embodied by the column vector of the mixture matrix. the simulation results show that it does enhance the performance of traditional detector without wasting the invaluable frequency resource

    傳統的通道估計演算法需要訓練序列使接收端的參數調整到理想狀態,而本文提出的基於ica的通道估計的多用戶檢測演算法不需要訓練序列,它是利用下行通道的固有特點,用ica的盲源分離法估計出多徑通道的卷積矩陣,從而從中提取出通道的延遲信息,模擬實驗結果證明這種方法在節省了頻譜資源的同時取得較好的估計效果,使得傳統的接收機的誤碼性能得到了很大的提高。
  7. In the protocol, a hierarchy is currently used to manage the peers in the system, and a multicast path, which adapts to the request of delay and bandwidth, is constructed for the data transfer of media streaming

    協議中利用分層拓撲結構來組織和管理應用層組播網路中的節點,在此基礎上構建滿足流媒體數據傳輸對延遲、帶寬要求的組播路徑。
  8. An algorithm of path - based timing optimization by buffer insertion is presented. the algorithm adopts a high order model to estimate interconnect delay and a nonlinear delay model based on look - up table for gate delay estimation. and heuristic method of buffer insertion is presented to reduce delay. the algorithm is tested by industral circuit case. experimental results show that the algorithm can optimize the timing of circuit efficiently and the timing constraint is satisfied

    提出了一種基於路徑的緩沖器插入時延優化演算法,演算法採用高階模型估計連線時延,用基於查表的非線性時延模型估計門延遲.在基於路徑的時延分析基礎上,提出了緩沖器插入的時延優化啟發式演算法.工業測試實例實驗表明,該演算法能夠有效地優化電路時延,滿足時延約束
  9. In addition, an experimental system using c language is established, including modules such as representation of waveform polynomial, decision of path senstization, delay computing, clocking based on single - period sensitization, clocking based on multi - period sensitization, test generation considering noise and transformation from bit - level waveform polynomial to word - level polynomial model. they respectively used to test models and techniques proposed in this paper

    另外, :基於c語言本人設計開發了一個實驗軟體系統,該系統包括波形多j一貞式表示模塊、敏化通路判定模塊、延時計算模塊、單周期敏化的最小時鐘周期精確確定模塊、多周期敏化的最小時鐘周期確定方法模塊、考慮噪聲的測試生成模塊和位級波形多項式描述轉化成字級多項式描述模塊,分別用於對本文各章中提出的自動化設計的模型和方法進行實驗驗證。
  10. Using the model dividing technique, the virtual scene is divided into small - scale sub - scenes. meanwhile, by combining the different transferring sequence of sub - scenes, this could not only reduce the network delay, but allow the combination of sub scenes in any sequences so that users can choose their own path to follow

    結合模型分割技術,將虛擬場景分割成小規模的子場景,這樣即有利於降低網路延遲,同時通過組合子場景的不同傳輸順序,打破流式傳輸的固定路線傳輸,在一定程度上滿足用戶挑選路徑瀏覽的需求。
  11. We further developed an adaptive packet marking scheme based on one of our router numbering schemes. the maiking scheme is better than others in that there is leys workload, fewer false positives and fewer packets are required in path reconstruction. the last also reduces the time delay before responding to dos attacks

    我們在此基礎上提出了一個基於路由器編碼的自適應包標記方案,該方案無論在路徑追蹤的運算量上、在追蹤的誤報率上,還是在追蹤所需的數據包的數量上(這與在攻擊中進行追蹤所需的時間緊密相關,從而直接影響到對攻擊響應的快慢)等多個方面都比同類的方法優越。
  12. Our simulation shows that the path will not be improved obviously with the further increase of k, when it reaches a certain value. in addition to this, the dissertation shows that when rh = 3 and rh = 4, the results are similar. 2. in regard to the application layer routing of tree - based p2p multicast, the dissertation presents a new kind model of spanning tree, named dcmd, in which the path delay, the

    2 .在基於樹的p2p組通訊的傳輸路徑方面,抽象了一個新的生成樹問題? ? dcmd問題,該問題同時考慮了線路延遲、主機的發送/轉發延遲和每個主機的工作負載有限三種情況,可以更加全面地刻畫出構建在應用層的p2p組通訊;證明了這個問題屬于np - hard ;提出了基於最大度和基於最長路徑兩類啟發式演算法作為解決該問題的途徑。
  13. In addition, several way are adopted to optimize the one dimensional transform architecture. improving the architecture resulting from the standard lifting scheme reduces the critical path delay ; an embedded boundary extension algorithm is adopted instead of the standard symmetric extension and it ’ s easier to implement ; the pipeline technique is adopted to increase the speed of processing ; coefficients of the multipliers are transformed into csd forms and the multiplications are substitute by minimum shift - add operations

    改進了由標準的提升演算法得到的變換結構,減小了關鍵路徑上的延時;採用內嵌的邊界延拓來代替標準的對稱延拓,實現更加簡單;採用流水線技術顯著提高了處理的速度;把乘法器系數表示為csd形式,將常系數乘法優化為最少的移位加操作。
  14. It combines boolean algebra expression with time information to describe behavior of a digital circuit. it has made substantive progress at path sensitization, power dissipation estimation, iddt and delay fault diagnosis. theoretically, it is necessary to establish some mathematical foundation in order to define distance, limit and continuity based on boolean process

    它將布爾代數與時間結合起來,為異步性描述提供了比較形式的理論基礎,並在通路敏化、電源消耗的計算、動態電流測試方法( i _ ( ddt ) ) 、時延故障診斷等方面取得了實質性的進展。
  15. Transmission path delay

    傳輸通路延遲
  16. The author considered great numbers of transmission characteristics of real channel in lms model and properly simplified it according to requirement in the project. the key characteristics in the model include multi - path fading, shadow fading, doppler shift, propagation noise, multi - path delay and and state transform of three status homogeneous markov chain described by lms model, etc. the key characteristics of channel are properly collocated and made to be the evidence theory of hardware implementation

    Lms模型考慮了大量的實際通道傳輸特性,結合課題需求,實現過程中對lms模型做了適當簡化,考慮了其中的多徑和陰影衰落、多普勒頻移、傳播噪聲、多徑延遲以及lms模型所描述的三狀態齊次markov鏈的狀態轉換等,對其所描述的主要通道特性適當組合,以此作為硬體實現時的理論依據。
  17. It ’ s critical path delay is very little, and it operates in the fully - pipelined continuous decoding manner

    它關鍵路徑延時很小,並且為全流水線連續解碼工作方式。
  18. Due to a variety of its advantages such as high bandwidth efficiency and robustness against multi - path delay, it has been widely used in the fields of digital audio broadcasting, digital television and wireless local area networks and is likely to become one of key technologies of fourth generation mobile communications

    由於具有很高的頻譜利用率,很強的抗多徑延遲能力,它已經廣泛的應用在數字音頻廣播、數字電視以及無線局域網當中,並有望成為第四代移動通信的關鍵技術之一。
  19. Simulator presented in this paper provides a direct interface for the test of shortwave communication system, which well represents various features of hf channel such as multi - path delay, rayleigh fading, doppler shift, doppler spread, gaussian noise and impulsive interference, etc. in order to realize the channel simulation for the intermediate frequency signal, we, inspired by the idea of soft - defined radio, bring forward a new design method that the channel simulator consists of several dsp chips

    本文研製的模擬器提供介面直接對短波通信系統進行測試,能夠全面反映短波通道的多徑時延、瑞利衰落、多普勒頻移、多普勒擴展、高斯噪聲和脈沖干擾等特性。為了實現對中頻信號的通道模擬,開發出一個結合軟體無線電思想的由多個數字信號處理晶元構成的短波通道物理模擬器。
  20. By way of analysis about the typical gps receiver tracking loops, the mathematical models of code multipath error and carrier phase multipath error are proposed in the dissertation ; by way of analysis about geometrical model of multipah signal, the mathematical model of differential path delay is proposed in the dissertation ; based on the above analysis, a improved carrier phase multipath mitigation algorithm using closely - spaced multiple antennas array is proposed, the result of computer simulation proves that the algorithm is feasible. the attitude parameters are often estimated using direct computation method. the relationship between the accuracy of attitude parameters and baseline length as well

    本文從經典的gps接收機跟蹤環出發,分析了多徑效應對偽距觀測量、載波相位觀測量和snr的影響,提出了碼相位多徑誤差和載波相位多徑誤差的數學模型;通過對多徑效應的幾何模型分析,提出了多徑信號相對路徑延遲的數學模型;在此基礎之上,提出了一種改進的基於窄間距多天線陣列的載波相位多徑誤差抑制演算法,通過計算機模擬證明了該演算法的有效性。
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