phase bit 中文意思是什麼

phase bit 解釋
定相位
  • phase : n 1 形勢，局面，狀態；階級。2 方面，側面。3 【天文學】（月等的）變相，盈虧；【物、天】相，周相，...
  • bit : n 1 少許，一點兒，一些；（食物的）一口，少量食物。 〈pl 〉 吃剩的食物；小片。2 〈口語〉一會兒，一...
  1. We saw you run a little bit wide out of the second chicane with three laps to go, what was the car like at that phase of the race

    問：在比賽還剩下三圈的時候，我們看見你在第二個發夾彎跑得太寬了，賽車在比賽階段中怎麼樣？
  2. Q : we saw you run a little bit wide out of the second chicane with three laps to go, what was the car like at that phase of the race

    問：在比賽還剩下三圈的時候，我們看見你在第二個發夾彎跑得太寬了，賽車在比賽階段中怎麼樣？
  3. Phase sweep space - time bit interleave coded modulation

    掃相空時比特交織編碼調制
  4. With the established rf front - end system simulation platform, adding the digital modulated baseband signal, this paper simulated the multifold digital modulated signal ’ s transmission, such as 2ask, qpsk, and 16qam. then researches of power compression and phase noise of local oscillation influence the bit error ratio for different modulated system. the designing is satisfied multifold functions request with the high - powered and integrated broadband rf front - end

    隨后在建立的寬帶射頻前端通用模擬平臺上，加入基帶數字調制信號，對多種數字調制格式的信號在該通用平臺上的傳輸作了研究，模擬了2ask 、 qpsk和16qam等調制格式信號的發射與接收，研究了功率壓縮和本振相位噪聲對不同調制的誤碼率影響，實現了滿足多種功能要求的寬帶高性能綜合射頻前端的設計。
  5. A novel multi - octave gaas monolithic 5 - bit digital phase shifter

    單片五位數字移相器
  6. Each time slot of the uplink frame contains a byte overhead, whose guard time is used to keep slight phase shifts from impairing the signal. the prepositive bit pattern is used for synchronization capture

    在上行幀的每個時隙里有位元組開銷，其防衛時間用於防止微小的相位漂移損害信號，前置比特圖案則用於同步獲取。
  7. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  8. Because of its competitive properties fiber comes to be the top choice and becomes the major form of networking. the key technique of optical network is optical & electronic media converters. with the advent of the new phase of full - optical communication, the terms " g bit / s " " hot - pluggable " and " diagnostic monitoring " have already begun to creep into the popular vocabulary

    光通信的核心技術在於光器件和光電器件技術，具有小型化、熱插拔功能和自診斷功能等三大特點的千兆sfp收發器將代替sip和gbic成為千兆收發器市場的主流，是通信用光電器件發展的必然趨勢。
  9. Fist, quick bit synchronization. the common methods are relative synchronization, multi - phase clock sample and so on

    第一，快速比特同步。常規的方案有相關同步法和多相位時鐘采樣法等。
  10. When receiving the uplink frame, olt searches the synchronization pattern to quickly capture the phase information of code flows and achieve the bit synchronization. based on the delimitation pattern, it then delimits the atm cell to accomplish the byte synchronization

    Olt在接收上行幀時，搜索同步圖案，並以此快速獲取比特流的相位信息，達到比特同步；然後根據定界圖案確定atm信元的邊界，完成位元組同步。
  11. In order to meet the requirement of phase - error and physical dimension, high - pass / low - pass filter phase shifter and solid - structure are applied in the design of if broad - band five - bit digital phase shifter

    考慮對相位誤差和物理尺寸的要求，中頻寬帶五位數字移相器採用高通/低通濾波器形式和立體結構進行設計。
  12. This paper researches basic principle of microwave digital phase shifter deeply, reviews different theories of all kinds of microwave digital phase shifter circuit, analyzes loaded - line phase shifter in detail and draws design curves according to formulas. and this paper presents a novel method, which makes use of modeling simulation that software - ansoft serenade 8. 7 provides to evaluate parameter values of pin diodes through s parameter measurement. then, a kind of 6 - bit digital phase shifter circuit is designed and simulated through software - ansoft serenade 8. 7

    本文對微波數字式移相器的基本理論進行了較深入的研究；綜述了各種微波數字式移相器電路的工作原理，著重對加載線式移相器電路進行了理論分析，並根據計算公式作出一系列相應設計曲線；提出利用軟體ansoftserenade8 . 7所提供的測量數據擬合功能，通過測量s參數來確定pin二極體等效電路參數的新穎實驗方法；利用微波電路設計軟體ansoftserenade8 . 7對6位數字式移相器電路進行模擬、優化設計，做出樣品，並對其性能測試分析，對研製微波數字式移相器具有重要的參考意義。
  13. By theory and practice simulation, the several types of constant envelope modulation techniques are analyzed and compared, including theirs modulation principle, phase path, the modulated wave envelope, power spectrums, error bit rate and the influence of its power spectrums of the band - limited and non - linear, etc. especially we have researched the ijf - oqpsk modulation technique, and the performance of its inter - symbol interference and time jitter free, and its strongly resisting of spectral spreading

    結合理論和實驗模擬結果，分析討論了衛星通信中的各種恆包絡調制技術，對它們的調制原理，相位路徑，已調波包絡，功率譜密度，誤碼性能，以及帶限非線性通道對其功率譜的影響等方面都作了研究和比較。特別研究了ijf ? oqpsk在消除碼間干擾和定時抖動方面的性能及其優良的旁瓣特性和抑制頻譜擴展特性。
  14. The protector makes the over - current value, zero - phase - sequence component, negative - phase - sequence and so on as protection criterions, in protection theory ; it makes atmel 8 - bit microprocessor at89c55wd as the core, with which the lattice lcd is linked, in hardware

    該保護裝置在保護理論上，以檢測過電流幅值、零序電流為判據；在硬體實現上，以atmel單片機at89c55為核心，外接圖形點陣式液晶顯示器、觸摸式按鍵等外設。
  15. Chapter 4 : the influence of different phase - shifting angle of reference wave in recording, of the phase - shifting error and of the quantization error on the quality of the reconstructed image is investigated respectively in two - step phase - shifting inline digital holography. and an effective method of eliminating the phase - shifting error is presented, in which the summation of the intensity bit errors of the reconstructed image is taken as an evaluation function for an iterative algorithm to find the exact phase - shifting value. the feasibility of this method is demonstrated by computer simulation

    通過數值分析不同相移角的選取對再現像的強度誤差的影響，發現再現像強度誤差依賴于記錄時相移角的選取，當相移角在一定范圍內，其再現像的強度誤差相對較小；提出了一種有效消除相移誤差的新方法，並將其應用於二步同軸相移數字全息，對此進行了計算機模擬，得到了很好的結果，證明該方法對于相移誤差的消除是很有效的；對量化誤差所作的數值模擬發現，當信號被量化成8比特（ bit ） ，即256個灰度級以上，量化噪聲的影響相對較小。
  16. Finally, it takes a detailed test to the processed millimeter 4 - bit digital phase shifter. the test result is better than expectant guideline : the maximum of the phase error is 10, the insertion loss is better than 10. 74db, the return loss is more than - 14. 88db in the 33. 9ghz 34. 5ghz frequency band. the whole volume of the phase shifter is 80mm 35mm 20mm

    最後，對加工出的毫米波四位數字移相器進行了測試，測試結果完全達到了預定指標要求:在所要求的33 . 9ghz 34 . 5ghz頻帶內，最大相移誤差小於10 ，插入損耗小於10 . 74db ，輸入輸出回波損耗大於- 14 . 88db ，整個電路尺寸為80mm 35mm 20mm 。
  17. The research of this paper is much practical. this dissertation discusses the work principles of several digital phase shifters respectively, and describes their characteristics. based on this, the milimeter 4 - bit digital phase shifter is designed by using different circuit format with 71 main line microstrip, incorporating the guideline and the level of process

    在此基礎上，結合所給的指標要求和實際的加工工藝水平，採用71的微帶線作為移相器的主線，四位移相位採用了不同的電路形式，針對大移相位相位精度誤差大的缺陷對傳統的反射型移相器電路進行了改善，設計出了毫米波四位數字移相器。
  18. A split alu structure has been used to accomplish the simd operation and achieve high speed operation. in the rtl level design phase, we apply 3 methods to improve the speed of alu unit and dag ( data address generation unit ) which support the bit - reserve addressing and circular addressing : 1

    在dag模塊的設計中，以超前進位加法器構成進位選擇結構實現了對于比特反轉尋址計算，以兩級流水（ id 、 da ）實現了窗口尋址計算，滿足了時延要求。
  19. This method is especially simple and easy to implement. furthermore, it fully capable of tracking digital control signals carried by 4 ~ 20ma analog signals ; during software development phase, we have completed signal collecting, lcd displaying, d / a converting of hart signal and ieee - 754 32 bit float point conversion. we used a simplified method in ieee - 754 32 bit compatible float point conversion based on the 24 bit integer and 16 bit decimal computation

    在hart信號的解調外圍電路中採用遲滯比較電路實現波形的轉化，這種方法簡單、易實現，完全能夠跟蹤加載在4 20ma模擬信號上的數字控制信號；在軟體設計中，完成了hart信號的採集編程、 lcd顯示編程、 d a轉化控制編程和ieee - 75432位浮點數的轉化編程， ieee - 75432位浮點數轉化編程採用的是在最多滿足24位整數位和16位小數位的基礎上的一種簡化演算法。
  20. Five cell circuits are designed, fabricated and tested, including 5. 625 degree and 45 degree using loaded - line phase shifter, 90 degree using 3db branch - line coupler phase shifter, 90 degree and 180 degree using switched - line with loaded - line phase shifter. according to the testing result of cell circuits, and requirement of ku - band six - bit digital phase shifter, the scheme for ku - band six - bit digital phase shifter is chosen

    本文對5 . 625度和45度相移位採用主線加載的加載線形式，對90度相移位採用3db支線耦合器形式和加載式的開關線形式，對180度相移位採用加載式的開關線形式，分別進行了五個單元電路的設計、製作與測試。
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