phase logic 中文意思是什麼

phase logic 解釋
階段邏輯
  • phase : n 1 形勢，局面，狀態；階級。2 方面，側面。3 【天文學】（月等的）變相，盈虧；【物、天】相，周相，...
  • logic : n. 1. 邏輯，理論學。2. 推理[方法]；邏輯性，條理性。3. 威力，壓力，強制（力）。
  1. Note that the data from the provider is passed during the prerendering phase of the page and control cycle, so you should plan to process the data and update any logic in the consumer after prerendering is complete

    注意，由於是在頁和控制項周期的預呈現階段傳遞來自提供者的數據，因此在預呈現完成後您應計劃在使用者中處理數據和更新任何邏輯。
  2. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  3. According to the principle of generation of prime number through boolean algebra logic operation and phase angle matrix analysis of the periodic function it comes out that any even number larger than 4 can be expressed as the sum of two prime numbers ， i. e. “ 1 + 1 ” is tenable, and thereby finishes demonstration of the validity of goldbach ' s conjecture

    根據素數的形成機理，從布爾代數的邏輯運算和周期函數的相角矩陣分析，都得出了大於4的任何偶數都可表示成兩個素數之和即「 1 + 1 」成立，從而完成了哥德巴赫猜想成立的論證。
  4. The reactive power compensation is an important engineering in the power system. the active reactive power compensator designed in this text takes the instantaneous reactive power theory of three - phase as foundation, and is formed by the reactive current testing circuit, current tracking control circuit and the main circuit, and among them the current tracking control circuit is formed by instruction current arithmetic circuit, current polarity checkout circuit and current tracking control logic circuit three parts in the circuit form

    無功功率補償是電力系統中的一項重要工程，本文所設計的有源無功功率補償器是以三相瞬時無功功率理論為基礎的，它由無功電流檢測電路、電流跟蹤控制電路和主電路三大部分組成，其中電流跟蹤控制電路由指令電流運算電路、電流極性檢測電路和電流跟蹤控制邏輯電路三部分構成。
  5. A practical digital logic electric circuit of phase failure and phase stagger protection for three phase asynchronous motors

    一種實用的三相異步電動機斷相錯相保護數字邏輯電路
  6. The second phase is the analysis to the inner structure of web table. this thesis discusses deeply at this phase. the key point to recognize the table structure is to extract a abstract logistic table from variants of table structures. this thesis presents a table analysis modal, according to which, the physical table, the abstract logic table and

    識別表格結構的關鍵在於從不同類型的表格中提取出一種抽象的邏輯表格模型。本文提出了一種表格分析的層次模型，在該模型指導下，逐步生成物理內存表格、抽象邏輯表格以及功能性表格。
  7. In the aspect of theoretical research : firstly, general descriptive format of controlling rule is discussed based on trait of intelligent control ; secondly, principle and tactic of basic logical controller are discussed based on panboolea algebra, and then control rules of basic logical controller are symbolized by using panboolea algebra ; at last, control idea of nine - points controller is presented based on basic logic controller, and control tactic is also analyzed based on phase - plane method

    在理論研究方面：首先從智能控制的自身特點討論了其控制規律的一般描述形式；然後以泛布爾代數為理論基礎，討論了基本型邏輯控制器的控制原理與策略，將邏輯控制器的控制規則用泛布爾代數符號化；最後以基本邏輯型控制器為基礎，討論了九點控制器的控制思想，並從相平面的角度對控制器的控制策略進行了分析。
  8. At the same time, we have discovered some bug in cooperate between the two type protection, analyzed different result in different condition as config with different logic protection, show that the incorrect relay act result from these bug only appear when line is in incompletely phase operation and occur fault, furthermore the mass computer protection have comprehensive incompletely phase logic, so this condition can not seriously threaten the power system

    同時，也發現了兩種保護裝置在配合上存在一些缺陷，分析了這種邏輯上的不配合在不同情況下所造成的不同後果，並且指出由於這些缺陷所造成的保護裝置不正確動作的情況僅在線路非全相運行時又故障的情況下才可能出現，而且現有的成套微機保護的都具有較為完善的非全相邏輯，在保護裝置正常投運的情況下，還不致對系統安全構成重大隱患。
  9. Based on optimal control theory and singularly perturbed theory, a singularly perturbed midcourse guidance law that guarantees air - to - ground missiles to ascent quickly is proposed. this new guidance law is a composite control law consisting of three parts : optimal climbing control using variable weighting factor method, minimum energy cruising phase control and minimum energy switching phase control. moreover, a new control logic is designed in order to remove influence of climbing control on switching phase. simulation results of a certain type of air - to - ground missile are presents. it is shown that, with simple control algorithm and feasible onboard implementation, this law not only guarantees air - to - ground missiles to ascent quickly, but also satisfies the requirements of midcourse phases. the studies have important theoretical meaning and great value of engineering application

    為滿足實際作戰的要求，基於最優控制理論和奇異攝動方法，提出了一種可保證中遠程空地導彈快速爬升到最優高度的中制導律.它由變系數最優爬升控制，最小能量巡航控制和最小能量下滑控制組成.為了減小爬升段控制對下滑段的影響，提出了一種新的控制邏輯.最後針對某型空地導彈進行了模擬.結果表明，該中制導律較好地滿足了中遠程空地導彈在中制導段的要求.本文的研究結果具有較好地工程參考價值
  10. Abstract : based on optimal control theory and singularly perturbed theory, a singularly perturbed midcourse guidance law that guarantees air - to - ground missiles to ascent quickly is proposed. this new guidance law is a composite control law consisting of three parts : optimal climbing control using variable weighting factor method, minimum energy cruising phase control and minimum energy switching phase control. moreover, a new control logic is designed in order to remove influence of climbing control on switching phase. simulation results of a certain type of air - to - ground missile are presents. it is shown that, with simple control algorithm and feasible onboard implementation, this law not only guarantees air - to - ground missiles to ascent quickly, but also satisfies the requirements of midcourse phases. the studies have important theoretical meaning and great value of engineering application

    文摘:為滿足實際作戰的要求，基於最優控制理論和奇異攝動方法，提出了一種可保證中遠程空地導彈快速爬升到最優高度的中制導律.它由變系數最優爬升控制，最小能量巡航控制和最小能量下滑控制組成.為了減小爬升段控制對下滑段的影響，提出了一種新的控制邏輯.最後針對某型空地導彈進行了模擬.結果表明，該中制導律較好地滿足了中遠程空地導彈在中制導段的要求.本文的研究結果具有較好地工程參考價值
  11. At implementation phase, based on the design policy, we first choose the language rose as msr language, analyzing the advantage of using the language rose. then we sort the lfb in msr according to the rose language specification, and particular define these five categories of lfb in rose language. in msr, we design forty kinds of lfb in all. finally, we especially list the design and implementation scheme of some important lfb, as the gre logic function block - - checkgreheader, greencap, stripgreheader and the logic function block for distribution operation - - splitfirst

    在實現階段，根據設計方針，首先選擇rose作為msr的語言使用，分析了使用rose的好處。接著我們對msr中的lfb按照rose語言規范進行分類，並在rose語言中詳細定義這五類lfb 。使用rose語言描述邏輯功能模塊。
  12. Psl phase sequence logic

    相位順序邏輯
  13. Cls21 - i metallized polypropylene capacitors have low dissipation factor, stable capacitance, puny thermoguotiety. they can steadily work on logic control circuits & integral circuits and phase etc of instruments

    型金屬化聚碳酸酯電容器損耗小，電容量穩定，溫度系數小，能穩定地工作在精密儀器、儀表的邏輯控制電路，積分電路等場合。
  14. Cls21 - ii metallized polypropylene capacitors have low dissipation factor, stable capacitance, puny thermoguotiety. they can steadily work on logic control circuits & integral circuits and phase etc of instruments

    Ii型金屬化聚碳酸酯電容器損耗小，電容量穩定，溫度系數小，能穩定地工作在精密儀器、儀表的邏輯控制電路，積分電路等場合。
  15. Constant stator magnetic linkage control frequency converter includes power devices utilizing igbt, drive circuit using three - phase drive ic with multiple protection functions. pwm signal formation circuit in the way of voltage space vector control and realized with pld ( programmable logic device ) devices and compensation for the influence of supply voltage variation and stator resistance voltage drop

    其中，恆定子磁鏈控制變頻器的設計中主電路採用功率器件igbt ；驅動電路採用三相多功能集成驅動晶元； pwm脈寬調制信號產生電路採用電壓空間矢量控制方式，由pld器件實現；對電源電壓變化及電阻壓降造成的影響進行了補償。
  16. Method for traffic signal control at multi - phase intersections based on fuzzy logic

    一種基於模糊邏輯的多相位交叉口信號控制方法
  17. The paper takes siprom as source program of machine logic, analyzes compiled system with compiled phase and run phase written by c

    本文以高級語言siprom編寫機床邏輯用戶源程序，以c語言編寫編譯程序和運行程序來完整分析編譯系統。
  18. Utilizing phase locked loop technique with complex programmable logic devices ( cpld ), a method to perform high - speed data acquisition, storage and transmission for transformer testing, which solves the problem of data acquisition for high frequency band, is proposed

    摘要提出了利用鎖相環技術結合復雜可編程邏輯器件（ cpld ）實現對變壓器測試信號的高速採集、存儲、傳輸的方法，很好地解決了對變壓器高頻特性信號的採集。
  19. This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process

    本文研究了一種實用的步進電機細分驅動系統，由數字控制模塊、驅動模塊和電源模塊組成，系統以at89c52單片機為核心，通過單片機的i o口、定時器計數器中斷來實現外部事件監控以及控制信號的產生，系統將可編程邏輯器件（ pld ）器件和在系統編程（ isp ）新技術引入到細分驅動環行分配器的設計，通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構，大大簡化了電路，並提高了電路抗干擾能力。使系統實現參數存儲，速度數字控制，數碼顯示，進退刀控制等功能。
  20. The design phase includes the standardization of rtl coding, logic synthesis and place & route ; the verification phase includes the function verification, static timing analysis and physical verification for 08c01

    設計工作包括對08c01軟核的rtl級代碼標準化、邏輯綜合和布局布線；驗證工作包括對08c01軟核的功能驗證、靜態時序分析和物理驗證。
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