power asic 中文意思是什麼
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Delay and power calculation standards - pre - layout delay calculation specification for cmos asic libraries
延遲計算和功率計算標準. cmos集成電路子程序庫.預布局延遲計算規范 -
Xiaotao chang, dongrui fan, yinhe han, zhimin zhang. “ fast algorithm for leakage power reduction by input vector control ”. the 6th ieee international conference on asic ( asicon2005 ), october 24 - 27, 2005, shanghai, china
常曉濤,范東睿等, 「應用輸入向量控制技術降低漏電功耗的快速演算法」 ,計算機研究與發展, 2006年43卷5期, ( 946 - 952 ) 。 -
Cmos delay and power calculation standards - part 2 : pre - layout delay calculation specification for cmos asic libraries
延遲計算和功率計算標準.第2部分:互補金屬氧化物半導體 -
The design of this asic ( application specific integrated circuit ) is more advanced in power consumption, clock & calendar circuit and reset circuit making it more competitive than similar domestic products
該驅動電路asic的設計在功耗、時鐘日歷電路、復位電路等方面較國內同類產品有明顯改進,使得該晶元在市場競爭上將具有較大優勢。
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