processor implement 中文意思是什麼
processor implement
解釋
處理機實現-
This one board uses few chips to implement a powerful processor.
這種單板用幾塊片子構成功能很強的處理器。 -
Monitor server is the main part of the system, it has four parts : task manager, map generator, application processor and real - time processor. they work well together and implement the functions of the vehicle monitoring system
監控服務器是該系統的核心部分，它由任務管理器、地圖生成器、應用處理器和實時數據處理器四個部分組成，這四個部分協同工作，共同完成車輛監控系統的各項功能。 -
This digital amplifier made up of a digital inverter can implement the sine voltage signal ' s power amplifying based on the digital signal processor. with the high processing ability of dsp, the advanced digital control arithmetic can be realized in the software. also the feasible and effective technique for the time delay compensation of digital control can be achieved
該放大系統用數字化逆變器來實現電力系統正弦電壓信號功率的放大，利用dsp數字處理器高速的處理能力，可以使系統實現高性能的演算法控制，並且能靈活地對系統的誤差進行補償，從而實現逆變系統的高性能和高精度，為解決電力系統電容式互感器二次側帶負載能力弱的問題進行了有意義的研究。 -
Based on intelligent power module ( ipm ) and digital signal processor ( dsp ), this system used hack - emf ( electromotive force ) method to implement the sensorless control for brushless dc motor of air conditioner ( ac ) in fcv
該系統基於智能功率模塊（ ipm ）和數字信號處理器（ dsp ） ，採用反電勢法實現了電動汽車空調用無刷直流電動機的無傳感器控制。 -
The main contents of the paper are : i the relationship of the accurateness of calculation, complexity of calculation and hardware resources of the 5 - 3 dwt ; ii the basic theory of pci data transmission the controlling of the host to client and the data exchanging ; iii configuration of the video decoder saa7114h to implement the transformation of the analog to the digital image ; iv image acquisition, compression and transmission from the host to the acquisition board by the component of field programmable gate array ( fpga ), digital signal processor ( dsp ) with the controller of pci and video decoder saa7114h
Pci的數據傳輸原理，外部主機如何控制從屬設備以及如何進行數據交換。配置視頻解碼器saa7114h ，實現模擬ccd攝像頭模擬數據到數字數據的轉換，實現採集的功能。用fpga 、 saa7114h和集成pci介面的dsp實現圖像的採集、壓縮以及從採集板到主機的傳輸。 -
At first, we introduce the working flow of ir image processing and the structure of the image processor, then we present the goal of the design : image pre - processing and data communication. in the part of the image pre - processing, the factors causing the nonuniformity of fpas are analyzed particularly, and several. resolutions are presented, which characters are illustrated at last. according to the design requirement, we decided to implement the two - point nonuniformity correction method in fpga
在圖像預處理部分，首先就紅外成像傳感器非均勻性的成因進行了詳細分析，總結了紅外成像傳感器非均勻性校正的主要方法，分析了各種方法的優缺點；根據成像制導信息處理機實時處理的要求，利用現場可編程門陣列實現了基於浮點運算的兩點法非均勻性校正模塊。 -
The main processor we use is tm1300 produced by philips co. tmlsoo has a lot of advantages such as it has vliw which is suited to processing multimedia data and it also have a convenient developing tool. using tm1300 we only need few chips to implement our video - phone system
我們用philips的tm1300作為我們系統的主晶元，再配以必要的外圍器件來構成可視電話系統。之所以選擇tm1300 ，是因為它是一個高效率的dsp晶元，具有vliw指令，特別適合來進行多媒體處理。 -
Conclusively, the sma architecture is a promising way to implement high performance processor ; the continuous optimization framework smarcof can utilize dynamic execution profiles and heuristic rules to eliminate sma performance hindrance effectively. preliminary work discussed in this thesis showed encouraging performance boost potential and application compatibility of smarcof
綜合來說， sma結構是一個很有潛力的方向，而基於反饋信息的持續優化方式配合正確的啟發式優化規則能夠很好的挖掘sma結構的潛力，將體系結構優勢轉化為現實的執行性能。 -
Some resource - limited small devices cannot join jini network directly due to the inadequate processor power and small memory size. in order to implement the function of plug - and - play for such devices, the jini surrogate architecture technology can be used
對于那些資源有限的小型設備，由於受處理器能力、內存大小的限制，沒有足夠的能力運行java虛擬機以加入jini網路者，這些設備要利用jini實現即插即用，必須採用jini代理體系結構技術。 -
The combination of embedded system and digital signal processor is an effective method to implement hard real - time and high performance of embedded system
嵌入式處理器與高速數字信號處理器結合是實現嵌入式系統高實時和高性能的有效手段。 -
The first mass - market processor to implement multithreading, rs64 iv was faster and smaller than its predecessors
第一個市場份額很大的實現多線程的處理器， rs64 iv比之前的處理器的速度更快，體積也更小。 -
This thesis introduces the design of software & hardware as well as the detailed implement of the efw network card based on the arm7tdmi processor, including choosing the style of micro - processor, the style of nic chip, flash chip as well as sdram chip ; the design of integer electro - circuit ; the make of print board ; the jointing of apparatus and component ; and hardware debugging
本文詳細介紹了一種基於arm7tdmi處理器的efw網卡的軟硬體設計及其具體實現。 efw硬體設計及實現主要包括微處理器選型， nic （ networkinterfacecard ）晶元選型， flash晶元以及sdram晶元選型;整體電路設計;印製板製作;元器件焊接以及硬體調試等工作。 -
Then, in order to resolve the lack of tcp / ip stack in c / os kernel, this paper presents a simplified scheme to implement a embed tcp / ip stack at last, the fire control information exchange system is constructed based on arm processor and c / os kernel. 3. using pc104 embedded computer as the hardware platform, this paper introduces the process of developing fire control information exchange system that runs under wince through windows socket programming and evc develop tools
熟悉並移植c / os嵌入式操作系統，並通過添加tcp / ip協議棧和應用層介面函數，設計和開發基於arm處理器和c / os嵌入式操作系統的信息交換系統; 3 .採用pc104工控機為硬體平臺，熟悉嵌入式vc （ evc ）開發環境和基於windowssocket的網路編程模式，開發了基於wince操作系統的信息交換系統。 -
The simulation of the addressing mode provides the possibility for the instruction simulation, and the simulation of the interrupt, timer and serial port lets the simulator implement the functions of the interrupt, timer and serial like a processor, and the program control simulation provides the possibility for running the program. this function is also the base for debugging program, which can set step running mode, set break points by using this program
尋址方式的模擬為指令的模擬提供了可能，中斷、定時器和串列口的模擬使模擬器可以象處理器一樣完成中斷功能、定時功能和串列通訊功能，程序控制的模擬為程序運行提供了可能，這一功能又是調試程序的基礎，通過這個程序程序可以單步執行，設斷點執行。 -
Bsthd - i handset is specially developed for operating the tag by best technology company. it is made in 32bits arm processor. inside contains ucos operation system, 1mb byte user data, 128 x 64 lcd and 4 x 4 standard keyboard, so it can implement many custom - made function
Bsthd - i手持儀是倍思得科技專門為移動便攜操作標簽而開發， bsthd - i手持儀採用了32位arm處理器，內嵌ucos操作系統， 1mb位元組用戶數據， 128x64液晶顯示， 4x4標準鍵盤，所以可以實現非常強大的業務功能定製。 -
With the development of vlsi and hardware technology, the size of the multicomputer systems is becoming larger, and the probability of processor failure also increases. with the rapid development of the information technology, people increase their need of network communication. wireless networking is one of the essential technologies to implement the mobile computer network
近年來超立方體結構的多處理機系統得到廣泛應用，隨著超大規模集成電路和硬體技術的發展，多處理機系統的規模也越來越大，系統中出現處理機故障或處理機間的鏈路故障的可能性也隨之增加，因此，如何建立一個可靠的多處理機系統越來越受到關注。 -
( 2 ) in order to validate the efficiency of algorithm, this paper design and implement a testing, platform rule processor based on sql server. the main function of the processor is to translate the first order logic rule into embedded - sql programs, which make sql server dbms possess the capability in expressing recursive query with logic language
（ 2 ）為驗證演算法的有效性，該文設計實現了一個測試平臺? ?基於sqlserver的規則處理器，其主要功能為自動把一階邏輯規則轉換為含有sql語句的過程代碼，這使得sqlserver數據庫管理系統有了用邏輯數據語言表示遞歸查詢的能力。 -
Through analyzing the results, we expatiate the feasibility of using dsp to implement digital signature. in hardware design, tms320c50 chip is chosen as the core processor and electrical periphery circuit is designed on basis of it. the function and connection information of digital signature electric circle is presented in detail in this report. at last, the validation software of signature is accomplished in computer. we run the whole system to get the result of digital signature and its validation, thus verify the correctness of the signature and the validity in identifying attack
本次設計在硬體上採用的核心處理晶元為tms320c50 ，在熟悉此晶元的內部結構的基礎上，設計了處理器晶元的外圍功能模塊輔助電路，製作了簽名電路板和硬體介面板，本文具體給出了數字簽名電路板和介面電路板各部分電路塊的功能和接線情況。最後，在計算機中編寫了簽名驗證軟體，並給出運行整個系統得到的對數據「簽名」和對「簽名驗證」的結果，對數字簽名結果的正確性和識別攻擊的有效性進行了驗證。 -
The first section of this paper is concerned about how to implement video compressor based on h. 263 standard using fpga and dsp processor
本文第一部分介紹如何用fpga和dsp實現基於h . 263標準的視頻壓縮編碼器。
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