processor interconnection 中文意思是什麼
processor interconnection
解釋
處理機互連- processor : n. 1. 〈美國〉農產品加工者；進行初步分類的人。2. （數據等的）分理者；【自動化】信息處理機。
- interconnection : n. 相互聯系。
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The paper will study the upper questions based on the two interconnection networks. first, we give a fault - tolerant routing algorithm under the connectivity of the crossed cube in o ( n ) time and the length of the longest routing path ; second, with the rapid progress in vlsi, the failing probability of processors and links is very low, the traditional connectivity underestimates the resilience of large networks / here by applying the concept " conditional connectivity " introduce by harary, we show that the n - crossed cube can tolerate up to 2n - 3 ( n > 2 ) processors failure and remain connected provide that all the neighbors of each processor do not ' fail at the same time, the result is the same as the hypercube. we also give a related algorithm in o ( n ) time, and the length of the longest path ; third, we apply cluster faun tolerance introduced by q. - p
根據menger定理， n -維交叉立方體可以容納n - 1個故障頂點，我們給出了它的時間復雜度為o （ n ）的容錯路由選擇演算法及其最長路徑長度分析；在此基礎上本文證明， n -維交叉立方體的條件連通度為2n - 2 （ n 2 ） ，並給出了相應時間復雜度為o （ n ）的演算法及其最長路徑長度；除此之外，本文還證明當n -維交叉立方體中的故障簇個數不大於n - 1 ，其直徑不大於1 ，故障頂點總數不超過2n - 3 （ n 2 ）時，交叉立方體中任兩個無故障頂點都至少有一條可靠路徑。 -
Then, chapter four describes the details of the implementation of video processing subsystem from processor unit, storage architecture unit, data i / o host - slave bus, data i / o interconnection unit four design aspects. in chapter five, host application programs and windows device driver design based on wdm are discussed
第四章從處理器單元設計、存儲結構單元設計、數據i o主從總線設計，數據i o互連總線設計和系統控制中心單元設計五個方面分析視頻處理子系統的詳細設計。 -
Based on high speed and perfect performance micro - processor and rtos platform, the equipment can be applied to deal with quick interconnection of synchronous generator for hydro power station or resume supply rapidly after an event occurring
裝置以高速高性能微處理機及實時多任務操作系統?基本開發手段，實現水電站中同步發電機快速並網或事故處理后迅速恢復系統安全供電，具有良好的快速自動準同期控制功能。
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