pulling phase 中文意思是什麼
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The resonance network is connected to the gate, then the output and input matching network is designed to satisfy the oscillation criteria. then harmonic balance method is used to analysize and optimize the output power and phase noise. to minimize the load pulling effect a buffer amplifier is designed to isolate the oscillator and the load
本文在場效應管fet柵極上加上諧振網路（諧振網路是通過cst模擬得到的，它是串聯反饋迴路，介質工作在te01模，對于其後的fet ，它又相當於一個帶阻濾波器） ，然後設計輸入輸出匹配電路，使電路結構滿足起振條件，之後繼續用諧波平衡法模擬和優化，使振蕩器輸出功率合適，相位噪聲很低。
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