pulse block 中文意思是什麼
pulse block
解釋
脈沖塊-
In the sub block circuit design, the contents that the author had introduced include : the principle of band gap voltage reference and the design technique in low power supply ; the analysis of spike pulse noise rejection, frequency divider and dead time in oscillator and control circuit ; the selection of the width and length ratio of four switches and 2x / 1x mode change point in driver and mode selection circuits
在子電路設計中，作者比較深入分析的內容有:基準電路的原理及低電源電壓下基準電路的設計;振蕩器和控制電路中尖峰脈沖噪聲抑制、兩分頻電路及死區時間設定;驅動及模式選擇電路中開關管的寬長比的選擇及模式轉換點的設計。 -
Some functional blocks are set up with the basic block provided by spw, and some is programmed with c language. after the simulation of pulse compress mtd radar, the effect of some jamming signals is analyzed. especially, the jamming signal of high pulse repeat frequency is discussed
完成脈沖壓縮mtd雷達的建模以後，又討論分析了幾種常見的干擾式樣，如噪聲調幅干擾、噪聲調頻干擾等，著重討論了高重頻噪聲調頻脈沖信號的干擾效果，並對幾種不同形式信號的干擾效果進行了比較和分析。 -
In the subsystem of signal processing, digital sidelobe cancell block, digital pulse compress block, adaptive clutter canceller block, doppler filter and constant false alarm rate block are respectively discussed and set up. in signal processing, data in the same coherent processing interval form a matrix, and the data processing was completed based on the matrix. data are processed with the row vector or column vector respectively when needed
在信號處理分系統中，將脈沖壓縮得到的數據在各個相干處理區間進行處理，將一個相干處理區間的數據按照不同的脈沖重復周期和不同的距離單元排列成一個矩陣，當需要實現數字脈沖壓縮時對矩陣的各行（同一個脈沖重復周期的數據）進行處理，當需要實現多普勒濾波時，就對矩陣的各列（同一個距離單元的數據）進行處理。 -
Pulse skip mode is selected to design the whole chip organization and sub block circuit according to the comparison of the two control modes and the requirements of low power dissipation
通過兩種調制模式優缺點的比較並根據晶元低功耗要求，選用跳周期調制模式進行了電路的總體結構設計。 -
The mixed control chip sg3525a combined with hardware pi controller generates the high - frequency pwm pulse for the first inverter. the digital control block tms320lf2407a mainly provides current preset for constant - current source through the outer filter, pwm pulse for the second inverter and drive signal for the high - frequency pulse power supply
其中變極性電源的一次逆變pwm信號由pwm發生晶元sg3525a ，配以外部硬體電路pi調節器產生;一次逆變閉環控制迴路的電流給定（配以外部濾波） 、二次逆變pwm驅動以及高頻脈沖電源的控制則由tms320lf2407a數字控制器實現。
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