register transfer 中文意思是什麼
register transfer
解釋
寄存器傳送-
To provide notarisation and legalisation services for chinese citizens including notarisation of translations of various certificates and documents, and subject to the laws and regulations of the receiving state, register marriages and transfer of judicial documents
為中國公民辦理各類公證、認證（包括提供各種證明、證件的翻譯公證） ，在與接受國的法律規章不相抵觸的情況下辦理婚姻登記，轉送司法文書等。 -
To provide notarisation and legalisation services for chinese citizens ( including notarisation of translations of various certificates and documents ), and subject to the laws and regulations of the receiving state, register marriages and transfer of judicial documents
為中國公民辦理各類公證、認證（包括提供各種證明、證件的翻譯公證） ，在與接受國的法律規章不相抵觸的情況下辦理婚姻登記，轉送司法文書等。 -
This register provides the status of data transfer to cpu
提供數據傳送方面的狀態。 -
Register transfer level sign offrtl
暫存器傳送位階簽字保證 -
The verification process for a digital signal processor with very long instruction word ( vliw ) named thuasdsp2004, which is developed by tsinghua university microelectronic institute sponsored by national natural science foundation, is analyzed at the register - transfer level in this paper
本文介紹在國家自然科學基金的資助下，由清華大學微電子研究所設計的具有超長指令字（ verylonginstructionword ， vliw ）體系結構特點的數字信號處理器thuasdsp2004的rtl級功能驗證工作。 -
Register transfer level rtl
暫存器轉化層 -
To be responsible for the daily cleanliness, petrol filling management, maintenance, repair and compensation of insurance ; to be responsible for the annual examination, register transfer, paying bills and transact relative certifications of the vehicles
負責車輛的日常清潔維護、加油管理、保養、維修，出險理賠；負責車輛年檢、過戶、繳費及各類證明等有關手續的辦理。 -
Register transfer level floor plan
暫存器傳送層級平面圖 -
Register transfer level description
暫存器傳送位階記述 -
Rtl register transfer level
暫存器轉換層 -
Standard for vhdl register transfer level synthesis
Vhdl寄存器傳輸級合成用標準 -
Due to the development of 1c technology, now a complex system can be integrated in a chip called system on chip ( soc ). the design of soc needs new design methodologys and modeling tools. systemc is an open c + + modeling platform promoted by the open systemc initiative, which consists of a well defined set of c + + classes and a simulation kernel, supporting design abstractions at the register - transfer, behavioral, and system levels. the advantages of systemc include the ability for hardware - software co - design, the ability to exchange ip easily and efficiently, and the ability to reuse test benches across different levels of modeling abstraction
系統級晶元的設計需要新的設計方法和建模工具。 systemc是osci （ opensystemcinitiative ）組織制定和維護的一種開放源碼的c + +建模平臺，它由一個定義良好的c + +類庫及模擬內核組成，支持對系統進行寄存器傳輸級，行為級和系統級的描述。 systemc的優點包括對軟硬體聯合設計的支持，更高效和方便的進行ip交換，以及在不同的抽象模型間復用測試基準的能力。 -
Catalog data : digital logic ( 3 ) i, ii number systems and coding, logic design, sequential systems, register transfer language
美國亞利桑那州大學電機與計算機工程系開設的數字邏輯課程，內容包括教案、習題、教學大綱、參考資料等。 -
In another way, we develop a compiler in virtue of gcc ' s intermediate language, rtl ( register transfer language ), but we must rewrite the program of code generation and code optimization
此外，我們藉助gcc編譯過程中產生的中間代碼rtl （ registertransferlanguage ）文件，重寫目標代碼生成和優化功能程序，為新的目標機器開發c語言編譯器。 -
This dissertation focuses on automatic test generation ( atpg ) algorithms for very large - scale integrated circuits at register - transfer - level ( rtl )
本文主要是對大規模、超大規模集成電路寄存器傳輸級（ rtl ）的自動測試產生演算法進行研究。 -
And the process of functional verification consists of the implementation of rtl ( register transfer level ) simulation, gate level simulation and post - layout simulation in the process of design
驗證最關鍵的是測試方案的制定，而功能驗證的過程是在於在設計過程中實施rtl級模擬、門級模擬和后模擬。 -
Standard for verilog register transfer level synthesis
Verilog寄存器傳送級合成標準 -
Verilog ? register transfer level synthesis
Verilog寄存器級合成 -
Rtl vhdl register transfer level synthesis
Vhdl寄存器傳送級 -
Rtl : register transfer level
寄存器傳輸級描述
分享友人