rtl 中文意思是什麼

rtl 解釋
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  1. 2. rat orthotopic liver trarlsplantation was performed in the strong rejecter combination of bn ( rtl " ) to lew ( rtl l ). this al1ogenic rejection model was stable and the survival time without immunosuppression agents was less than three weeks ( the average survival time was l 6. 6 i 2. 5 days, n = 5 )

    建立了大鼠bn （ rt1 ~ n ） lew （ rt1 ~ l ）原位肝移植同種異體排斥模型，該模博士學位論義基因轉移hu la個ig誘導大鼠移植肝免疫耐受的實驗研究中文摘要型排斥反應時間較為恆定，在不應用免疫抑制劑的情況下，生存期3周（平均生存時問人66士2
  2. But it is very difficult to synthetize directly form system model to soc system software aim code and synthetical rtl system structure

    但這些方法都試圖從系統模型直接綜合到soc系統軟體目標代碼以及可綜合的rtl硬體系統結構，難度很大。
  3. According to the program structure of ansi c, some syntax - tree - nodes are designed in front - end, including function, block, data structure, type, expression, identifier and so on. syntax tree is divided into three levels, namely program level, function level and block level, which are useful for analysis of syntax and semantic in compiler as well as transferring syntax tree into rtl. retargetable compiler mainly includes intermediate representation, machine description and interface technique between compiler and machine description

    編譯前端的實現技術包括詞法分析、語法語義分析和中間代碼生成技術等，針對ansic的程序結構，分別設計了函數、塊、數據結構、類型、表達式、標識符等語法樹結點，並將語法樹分成編譯層次、函數聲明和塊三個不同層次，使語法樹具有清晰的層次結構，有利於編譯程序的語法和語義分析，以及從語法樹到rtl中間表示的轉換。
  4. Application of rtl management in inspection and measurement system of lysteel

    實時物流管理在漣鋼請檢系統中的應用
  5. Specification for computer programming language rtl 2

    計算機程序設計語言rtl 2規范
  6. In chapter 4, the circuit of the carrier synchronization unit is implemented on fpga, the resistor transistor logic ( rtl ) schemes are presented

    第四章在fpga平臺上實現載波同步單元電路，並給出了實現后的fpga資源消耗、寄存器傳輸邏輯（ rtl ）原理圖。
  7. Hahn, who lives on 200 euros a week and has his rent paid by his mother, said he wanted to use some of the rest of the cash to finance his studies and buy a rail pass, rtl said

    目前，哈恩每周的生活費為200歐元，房租一直靠母親資助。他表示，在父母辦完婚事後，他將用剩下的錢去讀書並為自己買一張德國的火車通票。
  8. Based on the timing constraints event model of rtl ( real time logic ), the compiling algorithms for timing constraints event transform the problem of how to detect timing constraints event to the problem of how to find negative cycle in weighted directed graph, which is named as constraints graph. by simplifying constraints graph, the efficient detecting algorithms for timing constraints event have been developed, which not only has good time complexity but also can find events that violate timing constraints as early as possible. in order to verify the event detecting methods based on dynamic rules and to check its efficiency in application, experiment schemes are designed and performed on the implemented prototype system in linux environment

    帶時間約束事件的編譯演算法以rtl （ realtimelogic ）事件模型為基礎，將帶時間約束事件的檢測轉化為在帶權值的有向圖（此即受限圖）中尋找負圈的問題，它通過化簡受限圖得到最小有效約束集；運行時事件檢測演算法在最小有效約束集上檢查事件的時間約束，不但有較好的執行效率，而且能盡早地發現違反時間約束的事件。
  9. The second part studies the characteristics of cdma2000 1x reverse link, and implements a softcore design of the cdma20001x rtl soc with hdl ( hardwire desciptionin language ) verilog in accordance with the is - 2000 specifications. the model include the softcore of a spread spectrum modulation and a simple 8 - bit processor. as the same time simulate all the parts of the soc softcore with software modesim

    ，本文的第二部分認真的研究了cdma20001x的反向鏈路的特點，設計反向鏈路的擴頻調製片上系統方案。用硬體語言verilog設計cdma20001x的擴頻調製片上系統的ip軟核。其中包括擴頻調制部分和一個8位的cpu設計。
  10. Register transfer level rtl

    暫存器轉化層
  11. The relationship between machine description and code generation, and the technique of mapping rtl into object code by tree pattern matching are described in detail

    重點研究了機器描述與代碼生成之間的關系、如何選用合適的中間表示進行目標機器指令系統的描述、樹模式匹配的目標代碼生成技術等。
  12. Rtl register transfer level

    暫存器轉換層
  13. Etbi can conveniently and efficiently access the structure and function information of rtl circuits for atpg. this dissertation presents a format - transformer, which can transform iscas - 85 and iscas - 89 benchmarks verilog hdl descriptions to inner data structure, etbl, applied in rtl atpg

    並且實現了相應的格式轉換器，將veriloghdl描述的iscas - 85和iscas - 89系列的rtl電路轉換為etbl描述的能運用於rtl電路測試產生的內部數據結構。
  14. There is the main work and achievements as follows : based the study of old rtl level ip core ’ s modeling methods, we study deeply transaction level ip core ’ s modeling methods, put forward transaction level ip core modeling method faced soc

    完成的主要工作和主要研究成果如下:在研究已有rtl級ip核建模方法的基礎上，深入研究行為級ip核的建模方法，提出了一種面向soc的事務級ip核建模方法。
  15. A split alu structure has been used to accomplish the simd operation and achieve high speed operation. in the rtl level design phase, we apply 3 methods to improve the speed of alu unit and dag ( data address generation unit ) which support the bit - reserve addressing and circular addressing : 1

    在dag模塊的設計中，以超前進位加法器構成進位選擇結構實現了對于比特反轉尋址計算，以兩級流水（ id 、 da ）實現了窗口尋址計算，滿足了時延要求。
  16. A research is done for studying the reusable design principles of bus function model ( bfm ) and bus monitor for reusability. the functional verification framework is proposed in this dissertation can be apply in soc system level, rtl level and gate level verification. we accumulated experiences to soc functional verification

    討論了功能驗證平臺中總線功能模型（ busfunctionmodel ， bfm ）和總線監視器（ busmonitor ）的設計方法，給出了可重用設計的規則；本論文建立的soc功能驗證系統結構，可以應用於較大規模的soc的系統級、寄存器傳輸級和門級的驗證中，通過本課題研究，為國內soc功能驗證積累經驗，為國家超大集成電路的發展奠定一個堅實的基礎。
  17. The work of this dissertation is to complete the rtl design and verification of clb - pvci bus bridge after studying and analyzing the clb bus protocol and pvci protocol

    本論文工作就是在研究和分析clb總線協議和pvci協議的基礎上，完成clb - pvci總線橋的rtl設計和驗證。
  18. Realtek semiconductor co., ltd. rtl - 8139 fast ethernet as a benchmark we ve chosen a multi - process we use term " process " because it use

    我們選擇了一個多進程（之所以使用術語「進程」 ，是因為它使用了
  19. Rtl _ registry _ optional - specifies that the key referenced by this parameter and the path parameter are “ optional ”

    也不行，會不會是其他問題，譬如路徑等，注冊表路徑的內核格式我不太了解。
  20. The work of this thesis is to complete the rtl design and verification of mlb / ahb bus bridge after studying and analyzing the mlb protocol and ahb protocol

    本論文的主要工作是在研究和分析mlb總線協議和ahb協議的基礎上，完成mlb ahb總線橋的rtl級設計和驗證。
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