sampling converter 中文意思是什麼

sampling converter 解釋
取樣轉換器
  • sampling : n. 1. 取樣（品），取標（本）〈指行動或程序〉。2. 樣品，標本。3. 剽竊拼湊歌曲。
  • converter : n. 1. 使轉變[改變信仰]的人。2. 改裝者，改裝品。3. 【冶金】煉鋼爐，吹風轉爐；【電，無】換流器，變壓器；變頻器；【自動化】變換器；密碼翻譯[編制]機。
  1. Compared with primary second sampling a / d converter, it realizes digital feedback by digital circuit and does n ' t adopt high accuracy d / a converter with complex technology and high price. it has many excellent qualities, such as high - integration, high - accuracy, widely used, low - price. it can be widely used in test and measure system, scientific instrument, iatric instrument, automatic test system etc. so popularizing this new type a / d converter has very significant meaning

    與原有的兩次采樣a / d轉換器相比，用數字電路實現數字反饋可不用技術復雜、價格昂貴的高準確度d / a轉換器，具有集成度高、準確度高、適用性強、價格低等優點，可廣泛應用於測量測試系統、科學儀器、醫療儀器、稱重儀器、自動測試系統等。
  2. A 3rd generation converter samples the signal 44, 100 times per second - with a frequency of 44. 1 khz kilohertz. this time resolution exceedingly determines the sound, which we finally perceive : a low resolution sampling or sample rate results in a more muffled sound because quickly oscillating sound waves i. e. high tone are not acquired correctly

    讀取頻率，也就是聲音的采樣頻率，的高低直接影響到我們最後所聽到的聲音，如果采樣頻率不夠高，聽到的聲音會感覺有點糊糊的暗暗的，因為沒有辦法讀取到某些振蕩頻率較高的聲波，也就是高音的部分。
  3. The architectures of the receiver are rf pass band direct sampling and if pass - band sampling with high - speed analog to digital converter after rf to if conversion. the first kind of architectures is hard to realize because of the requisition of devices is too high

    軟體無線電接收機分為射頻直接帶通采樣和將射頻信號變換到中頻后再進行帶通采樣，前者實現較難，對器件的要求太高，然後進行各種數字處理。
  4. Discussion about sampling method of liquid steel in converter

    關于熔煉成分取樣方法的探討
  5. Firstly, the system has a good snr and high accuracy, which is owed to wideband operational amplifier being used, accurate adjustment by da, 12 - bit high sampling ad converter being applied. secondly, data transmission becomes less by using forecasting code technology and dictionary compress technology, which are run by dsp on board

    本採集系統採用400mhz增益帶寬積的運算放大器，運用da高精度校準技術，並選用高采樣率低噪聲的12位ad轉換晶元進行模擬電路和ad轉換電路設計，既保證了數據採集系統的信噪比，又提高了系統測量精度。
  6. Abstract : the paper proposes a mathematical model of a / d converter with quantizing error, nonlinearity and differential nonlinearity errors for computer simulation, and based on the model, the errors caused by voltage change, current change and phase change in the power measurement are analyzed by computer simulation for both the asynchronous and quasi - synchronous sampling algorithms

    文摘:本文提出了具有量化誤差、非線性誤差和微分非線性誤差的a / d轉換器的數學模型，在該數學模型的基礎上，模擬分析了非同步采樣法、準同步采樣遞推演算法各種情況下的誤差，包括功率測量中電壓線性、電流線性、相位變化誤差及電壓測量的誤差。
  7. Consulting relevant reference and related theories in software radio, this thesis is working on technologies of digital channelized receivers, including the theories on a / d sampling, digital down converter, multi - velocity signal processing, polyphase filter and uniform dft filter bank

    本文針對電子偵察系統數字化實現，對數字式通道化接收機的相關技術進行了研究:包括a / d采樣的理論、數字下變頻相關理論、多速率信號處理的理論、多相結構優化抽取濾波、均勻dft濾波器組。
  8. Digital feedback twice sampling a / d converter is based on common accurate dual integral a / d converter. during the second sampling, through the control logic, programmable counters and switch control, realize digital feedback and substitute primary analogue feedback realized by high accuracy d / a converter

    在第二次采樣中，通過控制邏輯、可編程計數器和開關控制來實現數字反饋，以取代原有的兩次采樣a / d轉換器中通過高準確度d / a轉換器所實現的模擬反饋。
  9. The quantizing error, linear error and differential linear error of an a / d converter were deduced, after that the error model of synchronous sampling, asynchronous sampling and quasi - synchronous sampling algorithms used in power measurement were build in condition that a / d was not perfect

    推導了a / d量化誤差、非線性及微分非線性誤差的數學模型。然後，建立了采樣功率測量同步采樣演算法、非同步采樣演算法和準同步采樣演算法在非理想情況下的計算機模擬模型。
  10. For the teaching the hardware pwm inverter is designed, including the choice of power module, filter tache, auxiliary power supply, brake unit and protection circuits. in addition data sampling system is contrived with encoder and current / voltage sensors. the control circuit with tms320f240 for the core is presented at last. the circuit includes memory extension, d / a converter digital i / o interface and the interface of the serial port. the way of space vector pwm realization is briefly introduced in this paper

    接著，設計了pwm電壓型逆變器，其中包括主迴路功率模塊與濾波環節、控制電源、制動單元及保護電路設計。另外還利用霍爾元件與編碼器設計出數據採集系統。最後，給出了基於tms320f240的最小系統，包括存儲器擴展、串口擴展、數字i o介面以及空間矢量pwm的實現。
  11. High speed 14 bits 4 channels synchronous a / d converter is also chosen, which can successfully lead to sampling and hold of multiple channels signals

    在外圍電路的實現上，選取了四通道14位a d轉換器，真正實現了各路信號的同步采樣保持。
  12. The main chip of the usb interface circuit is a cypress semiconductor ' s product, cy7c64613, which has intergrated usb sie ( serial interface engine ) and enhanced 8051. the oscilloscope module is realized according to the real time sampling principle. it has two signal chunnels and a dual 8 - bit dual a / d converter whose most sampling rate is 40msps, so two signal acquisition can occurs in the same time

    隨后介紹虛擬儀器測試平臺中各硬體模塊設計實現： usb介面的主晶元是cypress公司的cy7c64613 ，此晶元集成了usbsie和8051核；示波器模塊根據實時取樣原理實現，採用雙8位a / d轉換器，提供兩條信號通道，可以同時採集雙路信號，最高的采樣率為40mhz ；信號源模塊採用直接數字合成（ dds ）原理實現，它所能產生的信號頻率為10hz 5mhz ，最小頻率解析度為9 . 537hz 。
  13. This is because a 3g converter commits errors during sampling far below the upper hearing limit, and it is this aspect which has occupied development teams all over the world - until now. on principle, even a 4g converter is light years away from operating " perfectly ; " however, errors pointed out here are significantly shifted to an area where they cannot be perceived, even with perfect hearing

    在3g的年代，因為技術上的問題， 44 . 1khz被實現的其實低於理論上的22 . 05khz ，甚至離我們的聽力上限還有段差距而現今的4g技術仍然依照相同的原則，但運用更新的科技來拉近理論與實際操作上的距離，進而發現了一個聽力不可及的區域。
  14. The floating - point a / d conversion scheme was employed to increase the system ' s dynamic range. complex programmable logic device ( cpld ) was also used to perform the system ' s function such as data sampling trigger control and data storage control, etc. aduc812, a new type of microprocessor with full a / d converter, was utilized to fulfill the a / d conversion

    在數據採集電路設計中，採用了浮點放大技術來提高系統的動態范圍；通過引入可編程邏輯器件來實現觸發控制、存儲控制；采樣過程中應用了時序重疊技術，從而實現了數據採集系統的流水線作業方式。
  15. By using the high - speed, high - resolution and high - performance analog - to - digital converter and the special pci bus interface chip, we complete the design, test and analysis of the this sampling system

    採用高速高精度a / d器件和pci總線專用介面晶元，完成了基於pci總線的高速高精度信號採集系統的設計和調試分析。
  16. In hardware design, it dominate a / d converter chip real time sampling with fpga. in software design, it adopt embedded real time operating system to meet the real time of ecu system, at the same time, it solve the problem of control software complexity and maintenance difficulty

    在硬體設計上，採用fpga控制a / d轉換晶元實時採集數據，在軟體設計上，採用嵌入式實時操作系統，以滿足ecu系統對實時性的要求，同時，較好的解決了ecu控制軟體設計復雜和維護困難的問題。
  17. This paper discusses key technology in the digital intermediate frequency receiver with wide band based on software radio, including down - converter on condition of band - pass - sampling, digital down - converter, multi - rate digital signal processing, band - pass signal decimating, and achieves software system simulation based on under - sampling

    摘要分析了基於軟體無線電的寬帶數字中頻接收機中的關鍵技術帶通采樣下變頻技術、數字下變頻技術、多速率處理技術，並實現了欠采樣技術條件的軟體系統模擬。
  18. The important study is the electric parameter measurement system which is achieved with sigma - delta a / d converter and dsp " sampling to three phrase voltage and current. its function includes the measurement of current, voltage, frequency, phrase, power, factor, active power and energy, reactive power and energy

    本文主要研究了用? a d轉換器和dsp處理器對工頻三相電壓、電流進行數字采樣，再用數字低通濾波器實現對三相電參數進行測量的測量系統。其主要功能包括對電流、電壓、頻率、相位、功率因數、有功功率、有功電能、無功功率、無功電能等測量，並具有測量數據并行輸出介面。
  19. Data after ad sampling and digital down converter transfer to computer through pci bus interface, while base - band signal processing may choose cots dsp board or general high - performance pc in term of the need

    Ad采樣、數字下變頻后的數據通過pci介面傳入計算機，基帶處理可視需要選用多種商用dsp處理板，或選用高性能pc機。
  20. Combining the hardware and software, the real - time performance is also discussed. ( 5 ) when the system is debugged, some problems are discussed in detail and solved, such as volts d. c of the input signal caused by a / d converter and aliasing in frequency spectrum arising as re - sampling input data. experimental results show that the performance of the system is satisfactory

    （ 5 ）討論了本dsp系統的軟、硬體調試方法，並詳細地討論了在系統總體調試時，出現的各種問題? ?如a d器件引起的輸入模擬信號的直流偏置、波束形成過程中由於數據抽取引起的頻譜混疊，解釋和說明各種問題出現的原因，並提出了相應的解決方案。
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