shift bit 中文意思是什麼

shift bit 解釋
移位位
  • shift : vt 1 變動；改變；搬移；移動；轉移；變換；替換；更換。2 推卸；轉嫁。3 消除；撤除。4 【語言學】變換...
  • bit : n 1 少許，一點兒，一些；（食物的）一口，少量食物。 〈pl 〉 吃剩的食物；小片。2 〈口語〉一會兒，一...
  1. 64 - bit quantity, the shift count is given by the low - order six bits of second operand

    （ 64位數） ，則移位數由第二個操作數的低6位給出。
  2. 64 - bit quantity, the shift count is given by the low - order six bits of the second operand second operand 0x3f

    （ 64位數） ，則移位數由第二個操作數的低六位給出（第二個操作數& 0x3f ） 。
  3. In an arithmetic right shift, the bits shifted beyond the rightmost bit position are discarded, and the leftmost bit is propagated into the bit positions vacated at the left

    在算術右移位運算中，將丟棄移出最右側數位位置的數位，並將最左側的數位傳播到左端空出的數位位置。
  4. Construct a static force analysis model by using ansys, so as to calculate the influence line of control internal force of all nodes, and draw a conclusion of the maximum value of control internal force of all nodes under the influence of live load and the bit shift value of internal force of other corresponding member bars, in order to offer correlative data for local node analysis

    利用ansys建立全橋靜力分析模型，計算各節點控制內力的影響線，得出活載作用下各節點控制內力最大值以及與其相對應其他各桿件的內力位移值，為局部節點分析提供相關數據。
  5. Inserts a zero bit in the lowest position on each shift

    在每一移位的最低位置插入零位。
  6. Inserts a zero bit in the highest position on each shift

    Shr . un在每一移位的最高位置插入零位。
  7. The right - shift is an arithmetic shift high - order empty bits are set to the sign bit

    ，則右移位是算術移位（高序空位設置為符號位） 。
  8. Replicates the high order bit on each shift, preserving the sign of the original value in the

    復制每一移位上的高序位，並將原始值的符號保留在
  9. Arithmetic bit shift

    算術移位（
  10. As a result of the successful applicaion of shift bit processing and meliorative look - up table, the design for distance operation coprocessor saves many logic sources of fpga

    論文提出了移位處理和改進查找表的設計方法，有效節省了晶元的邏輯資源。
  11. In this paper, bit - error rate performance analyses are presented for coded and un - coded frequency hopping m - ary frequency - shift keyed systems under the condition of additive white gaussian noise ( awgn ) and partial band noise jamming and multitone jamming. the use of error - correct codes provide a way to improve the performance of frequency hopping system, particularly the use of reed - solomon code in a fh system under the condition of partial band noise jamming can greatly improve the performance of system. so we provide the way of coding and decoding of rs code in c language. in the end, we offer the simulation of the performance of time diversity fh / 2fsk system over partial band jamming noise channels

    第一章為緒論，敘述跳頻通信的發展趨勢，以及基本概念，第二章及第三章介紹提高抗部分頻帶干擾的前向糾錯碼reed - solomon碼的原理和實現方法。第四章研究跳頻通信系統在各種干擾條件下的性能。最後在第五章以fh mfsk系統為例，探討在部分頻帶干擾下的系統性能，並進行計算機模擬，模擬結果表明採用分集技術和各種編碼技術對于系統的性能改善具有明顯的效果。
  12. In an arithmetic right shift, the bits shifted beyond the rightmost bit position are discarded, and the leftmost sign bit is propagated into the bit positions vacated at the left

    在數學右移位運算中，將丟棄移出最右側數位位置的數位，並將最左側的（符號）數位傳播到左端空出的數位位置。
  13. Optical grating bit shift detection control system, and digital closed - loop servosystem, which controlled by the computer, can communicate mutually, exchange data and transmit control information. overall system can achieve the high accuracy position

    光柵位移檢測系統和閉環伺服控制系統，是由微機來控制的，它們可以通訊，以交換數據或是傳遞控制信息，實現高精度的定位
  14. Performs an arithmetic right shift on a bit pattern

    對位模式執行數學右移位。
  15. Performs an arithmetic left shift on a bit pattern

    對位模式執行數學左移位。
  16. The number of bits to shift the bit pattern

    要將該位模式移位的位數。
  17. A bit - shift operation performs an arithmetic shift on a bit pattern

    移位運算移位運算對位模式進行數學移位。
  18. This results in the next several plain text increments being mangled until the bad bit is shifted out of the shift register

    這將導致接下來若干次遞增的純文本出錯，直到出錯位從移位寄存器中移出為止。
  19. The phase shifter circuit consists of five digital bits corresponding to differential phase shifts of 180, 90, 45, 22. 5 and 11. 25 cascaded in a linear arrangement. the three lower phase shift circuits are of loaded - line type, in which the 11. 25 phase shift bit use a single loaded - line configuration. the 90 and 180 phase shift bits are of reflection type, using lange coupler to realize the separation between the incident and reflection signals

    移相器電路由五位移相電路級聯而成， 11 . 25 、 22 . 5和45移相電路為加載線型，其中11 . 25採用了單加載線形式； 90和180為反射型移相電路，使用蘭格耦合器實現輸入、輸出信號的隔離。
  20. The following are the bit shift operators defined in visual basic

    以下是visual basic中定義的移位運算符。
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