signal data processor 中文意思是什麼

signal data processor 解釋
信號數據處理機
  • signal : n 1 信號,暗號;信號器。2 動機,導火線 (for)。3 預兆,徵象。adj 1 暗號的,作信號用的。2 顯著的...
  • data : n 1 資料,材料〈此詞系 datum 的復數。但 datum 罕用,一般即以 data 作為集合詞,在口語中往往用單數...
  • processor : n. 1. 〈美國〉農產品加工者;進行初步分類的人。2. (數據等的)分理者;【自動化】信息處理機。
  1. The input signals pass through the prepositive circuit which transforming the measured signals ( voltage or current ) into small voltage signals, the signal adjust circuit consist of programmable - gain amplifier and filter, and digital signal processor tms320lf2407 for data acquisition and processing in turns. provide the measuring results on lcd module. and also can transfer data to the pc ’ s rs232 for farther analyse

    採用前置電路將被測信號(電壓或電流)變換為小電壓信號,經過信號調理電路對信號進行程式控制放大和濾波后,通過tms320lf2407實現信號的數據採集、信息處理和計算,將測量結果通過液晶模塊顯示,還可經過rs232介面與計算機進行數據傳輸,做進一步的分析和應用。
  2. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中,採用高速的dsp處理器,實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法,實現了大電流信號的驅動輸出;採用485總線技術,組建了裝置主機與多探測器之間的主從式通訊網路,實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路,採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術,實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元,設計了人機信息交互的介面;採用了模塊化的軟體設計方法,開發了裝置主機及探測器的軟體程序。
  3. Tms320vc5402 is a fixed - point digital signal processor, made by texas instruments incorporated, which is 16 - bit word length. vc5402 has enhanced harvard architecture built around one program bus, three data buses, and four address buses for increased performance and versatility

    另外,採用mcs - 51系列cpu作為採集處理卡板載mcu也存在一些比較嚴重的問題,如cpu的指令執行速度慢,總線帶寬窄等缺點,不能完成數據的高速處理。
  4. It " s function is to receive laser signal and to sent out the electric signal ; the second is the monolithic processor system. this part function is to pick up the electric signal sent by ccd detector and to compute the digital signal to get the data where the laser beamed, then sent the data to pc computer ; the third part is the control interface for people to control whole measurement process

    本文介紹的桁架梁撓度實時檢測的電荷耦合( ccd )測量系統由ccd接收系統,單片機測量系統和pc機測量軟體三部分組成。該系統採用線陣ccd為傳感器,以8031為控制核心,在單片機系統和pc機軟體之間建立了可靠的通信,能在比較惡劣的條件下獲取、顯示、存儲、處理和比較桁架的撓度值。
  5. With the rapid development of information technology, all kinds of portable electronic products and personal digital assistants are coming forth, the information source of these products partly roots in newspapers and journals, if the literal data could be acquired in optical scan mode instead of traditional keyboard input mode, human hands will be further liberated. on the other hand, the digital signal processor ( dsp ) specially designed for high - speed digital signal processing is playing an important role in the digital field, and the dsp with high processing speed and excellent operation performance is particularly adapted to image processing and character recognition. in consequence of this status, making use of new technology, this thesis researches into miniature intelligent reading system based on dsp and then presents a system solution of it

    隨著信息化技術的飛速發展,各種便攜式電子產品和個人助理不斷涌現,這類產品的信息來源有很大一部分都是報紙、書刊等文字資料,如果以文字的光掃描輸入取代傳統鍵盤輸入將會進一步解放人的雙手;同時專門為高速數字信息處理而設計的數字信號處理器( dsp )也成為數字化領域的重要角色, dsp的高速度和良好的運算性能特別適合於圖像處理和文字識別。
  6. Digital signal processor calculates ration error, and real - time property of data processing is ensured

    數字信號處理器完成比差的計算,保證數據處理的實時性。
  7. This paper presents a design method of an off - line portable scanner, which can be used without computer. we discuss the system based on a synchronous digital signal processor with multicenter, which is used to gather data with high speed. ti ' s tms320vc5402 is a sixteen - bit fix processor, and we make it the core of our control system

    本文提出了一種能夠脫機使用的便攜式掃描儀的設計思想,論述了高速多通道同步dsp數據採集系統,以高性能的tms320vc5402十六位定點dsp為核心,充分利用其強大而高速的數據處理能力對採集的數據進行復雜的運算,並快速以圖形方式輸出處理結果。
  8. The second part is a detector which is used to detect the distribution of voltage on the patient ' s brain surface from all different directions. the third is a mixed signal processor ( c8051f020 ) which is used to control the other parts of the system and display some necessary information and convert the voltage signals into digital signals, as well as transmit the acquired data to the computer. the fourth is computer with eit software which is used to analyze and process the received data and construct a picture for the brain edema and haematoma on screen

    32通道電阻抗斷層成像系統由4個部分組成:第一部分是正弦波恆流源,用來產生注入大腦的激勵電流;第二部分是電位信號的提取與轉換,用來提取當激勵電流注入時,在大腦表面形成的電位分佈信號;第三部分是數據採集與控制系統,用來控制激勵電流的頻率,注入方向,注入強度,控制採集大腦表面的電位分佈信號,並且將這些採集的電位分佈數據傳到pc機;第四部分是計算機eit成像軟體,用來接收下位機的電位分佈數據,並且對這些數據進行分析計算,重建電阻抗圖像。
  9. In this article, two projects - " sqy - 15 encrypt subsystem of hospitalization insurance system " and " general image compress flatform " are combined to get a resolvent scheme to realize data encrypt and image compress based on digital signal processor ( dsp ) and application specific integrated circuits ( asic ). this article includes three key technologies in designing and realizing the data encrypt card and the image compress flatform. they are : ( 1 ) design of dsp application system ; ( 2 ) epld designing technology using vhdl language ; ( 3 ) pci interface technology

    本文結合「 sqy - 15醫療保險信息系統加密子系統」和「通用圖像壓縮平臺」兩項目,提出了基於數字信號處理器( dsp )和可編程專用集成電路( asic )實現數據加密卡和圖像壓縮平臺的解決方案,重點介紹了基於dsp的數據加解密卡和圖像壓縮平臺設計與實現中的三個關鍵技術: ( 1 ) dsp應用系統設計; ( 2 ) vhdl語言設計epld技術; ( 3 ) pci介面技術。
  10. In order to get data, the plane use the way of comparative between the black line and white line. the device is composed of the pulse producer, system controller, signal processor, logic analyzer, interface circuit and electrical machinery driver. this device could follow the tracks of the plane graphic border automatically

    跟蹤裝置運用黑白交界圖線比較法取得數據,由步進脈沖發生器,系統控制器,信號處理器,邏輯判別器,介面電路,電機驅動器等組成,可對平面圖形邊界進行自動跟蹤控制。
  11. In this dissertation, several technology problems of pulse trains deintrleaving algorithms are dealt with, they are presorting techniques based on coherent processor, probabilistic neural network deinterleavers, adaptive data association methods for pulse trains analysis and deinterleaving, signal processor designing issues. the research is focused on real time processing. the coherent processor is a crucial technique for real time presorting

    本論文研究高密度復雜信號下的脈沖列去交錯技術的若干問題,包括基於關聯比較器的信號預分選技術研究;概率神經網路脈沖去交錯器的研究與設計;卡爾曼濾波和概率數據關聯方法用於脈沖列分析和去交錯;雷達截獲系統信號處理器設計等等。
  12. Advanced fpga technology is introduced to improve the integration of digital circuits, and all digital circuits in the original module are integrated in the fpga chips, which could not only reduce the cost, but also improve the reliability and measurement precision of the circuits. high speed digital signal processor ( dsp ) is selected as the coprocessor instead of scm ; it can receive all kinds of commands sent from vxi, analyze and execute the commands, harmonize each section of the module and process the data. higher - conversion - speed comparator chip is adopted to convert the input signals being measured into square waveform signals which could be identified by fpga chip ; it can expand the measurement range of frequency dramatically

    本文在原有vxi總線四通道計數器模塊的設計基礎上,通過對原模塊缺陷的分析,採用一些新的技術和新的電子器件來重新設計該計數器模塊:採用最新的fpga技術來提高數字電路的集成度,將原模塊中的所有數字電路全部集成在fpga晶元中,這樣不僅能節約成本,還能提高電路的可靠性和測量精度;採用高速的數字信號處理器( dsp )取代原有的單片機作為協處理器,來接收vxi發來的各種命令,分析命令、執行命令、協調模塊各部分的工作以及對數據的處理;採用轉換速率更高的比較器晶元將輸入的被測信號轉換為fpga晶元能夠識別的方波信號,能極大提高測量頻率的范圍;採用d / a轉換晶元和隔離運算放大器得到隔離通道所需的比較電平,該比較電平值能夠根據實際需求進行設置,能增強模塊的使用靈活性。
  13. Harmonic analysis can be produced in as little as 10 milliseconds, or measurements may be integrated over more than a day. the user may set any measurement interval, perform synchronous averaging on harmonics, and even perform full spectrum analysis to detect non - harmonic signal content. the system s main processor controls all display, data storage and i o functions, thus allowing each channel to perform its analysis at maximum speed

    在每通道雙數字信號處理器結構中,結果形成超快速諧波分析,諧波分析可於至10毫秒產生,或可綜合測量超過一天,用戶可設定任何測量區間,執行諧波同步平均,及進行全頻譜分析從而探測非諧波信號內容,系統的主微處理器控制全部顯示數據儲存與i 0功能,故使各通道可於最高的速度下進行分析
  14. The main contents of the paper are : i the relationship of the accurateness of calculation, complexity of calculation and hardware resources of the 5 - 3 dwt ; ii the basic theory of pci data transmission the controlling of the host to client and the data exchanging ; iii configuration of the video decoder saa7114h to implement the transformation of the analog to the digital image ; iv image acquisition, compression and transmission from the host to the acquisition board by the component of field programmable gate array ( fpga ), digital signal processor ( dsp ) with the controller of pci and video decoder saa7114h

    Pci的數據傳輸原理,外部主機如何控制從屬設備以及如何進行數據交換。配置視頻解碼器saa7114h ,實現模擬ccd攝像頭模擬數據到數字數據的轉換,實現採集的功能。用fpga 、 saa7114h和集成pci介面的dsp實現圖像的採集、壓縮以及從採集板到主機的傳輸。
  15. This thesis deals with design and application of a multiprocessor made of four dsps in monitoring receiver. the broadband monitoring receiver requires a kind of chip with high performance because of complicated intermediate frequency signal processing. the author selects a kind of digital signal processor called adsp21160. during the process of design, the author uses cpld, fpga and some special cpus to finish signal, processing in the monitoring receiver. cluster multiprocessor based on vxibus made of four adsp21160 is put forward. the task distribution of four dsps is solved too. furthermore, data transition methods between chips at a high speed through link ports and chip extension mode using external port are recommended. the author debugs, emulates the program in one adsp - 21160 ez - kit lite and simulates the multiprocessor program in visualdsp + +

    本文主要探討了監測接收機中多dsp處理模塊的設計與應用,寬帶監測接收機的中頻處理數據量大、實時性高,這樣,對dsp晶元提出了很高的要求,作者通過比較選擇了最適用於監測接收機的數字信號處理器adsp21160 ,並結合使用了cpld 、 fpga以及一些專用的cpu來完成監測接收機中的數據處理。作者提出了由四片adsp21160組成的簇式多dsp處理模塊的結構並配以了vxi總線,論述了簇式結構的特點,解決了多dsp處理模塊中四片adsp21160的任務分配問題。
  16. The features of pci local bus, signal definition, command definition, bus operation and the addendum of the pci local bus specification, revision2. 3 are introduced briefly at first. then the structure and function of plx pci 9656 pci bus mastering i / o accelerator are summarized including : pci 9656 ' s three data transfer modes ( direct master, direct slave, and dma ) and direct connection to three processor local bus types ( m mode, c mode. j mode )

    在簡要介紹了pci總線的特點、 pci總線的信號、命令和操作規范、 pci總線的配置空間以及有關最新pci總線規范pci2 . 3里的一些新增和修改的內容之後,本文概述了plx公司的pci總線專用控制器pci9656結構和功能,並介紹了pci9656的發起者、從設備、 dma三種工作模式以及m 、 c 、 j三種局部總線介面方式。
  17. This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process

    本文研究了一種實用的步進電機細分驅動系統,由數字控制模塊、驅動模塊和電源模塊組成,系統以at89c52單片機為核心,通過單片機的i o口、定時器計數器中斷來實現外部事件監控以及控制信號的產生,系統將可編程邏輯器件( pld )器件和在系統編程( isp )新技術引入到細分驅動環行分配器的設計,通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構,大大簡化了電路,並提高了電路抗干擾能力。使系統實現參數存儲,速度數字控制,數碼顯示,進退刀控制等功能。
  18. The radio frequency receiver supports interface for instrument and base station and air interface for mobile station, and it takes the task of magnifying low noise and down - convert and digital baseband processor filtering and magnifying intermediate frequency to reverse link signal. the digital baseband processor samples the received signal after down - convert radio frequency signal to intermediate frequency signal and processes other processing and supports interfaces to computer, next sends data to computer. the gps receiver supports interface for instrument and gps system, and receives gps system signal, next it demodulates the correlative information and sends out benchmark clock signal we need

    射頻接收部分主要為儀器和基站、移動臺提供空中介面,其主要任務是在反向鏈路上對接收到的射頻調制信號進行低噪聲放大、射頻下變頻變換、中頻濾波放大等;數字基帶部分為對接收信號變頻為中頻后進行a / d采樣,以及其他的rsp處理並和計算機提供介面,將數據送至計算機進行后臺處理、顯示等; gps接收機部分為儀器和gps系統提供介面,接收gps系統信號並解調相關信息,輸出所需的電文及時鐘基準信息等。
  19. The radar signal simulator discussed in the thesis is a part of an arm signal processor. the main usage of the simulator is supplying data to test the efficiency of the arithmetic and the performance of the processor

    論文是基於反輻射導引頭信號處理器的研製展開的,模擬器的主要作用是提供數據以測試演算法的有效性及信號處理器的性能。
  20. It is a device which converts analog signals ( such as sound or voice from microphone ), to digital data so that the signal can be processed by a digital circuit such as a digital signal processor

    該轉換器將模擬信號(如麥克風傳出的話音信號)轉換成數字信號后,送入諸如數字信號處理器這樣的的數字線路進行處理。
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