signal phase design 中文意思是什麼
signal phase design
解釋
號志時相設計-
The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox
本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。 -
This paper introduces common background knowledge of intersection, mainly describes traffic control design principle, such as signal timing and lane channelization. it also summarizes the same point between signal timing and lane channelization in nature and illustrates that it is optimal cycle length and signal phase that is the critical part of signal timing
=本文介紹了交叉口的一般背景知識，重點闡述了平面信號交叉口的交通控制的設置原理，包括信號配時原理和路口渠化原理，概括了信號配時和路口渠化原理的本質相同點。 -
Fpga and dvb standard are introduced firstly, dvb - c standard and composition of its system are analyzed completely, development of modulator structure and dvb - c digital modulator composition are presented, more over, analysis of respective modular are given. then, principle of dvb - c digital modulator system are presented, they are error control technique 、 mqam 、 nyquist rule and root raised cosine filter 、 window design method for fir filter 、 multi - rate signal processing ( integer interpolating, conversion of fractional sampling, equal conversion of net structure, polyphase structure for filter, poly - phase structure for interpolator, multi - stage implementation of samplying conversion ) 、 distrubited algorithm 、 cic filter 、 dds 、 cordic algorithm
接著，專門利用一個章節闡述了dvb - c前端調制系統原理，他們了差錯控制技術、多進制調制（ mqam ） 、 nyquist準則與平方根升餘弦濾波器、有限沖擊響應濾波器的窗函數設計法、多抽樣率信號處理包括（整數倍內插原理、分數倍抽樣率轉換、網路結構的等效結構、濾波器的多相表示、內插器的多相表示、抽樣率轉換的多級實現） 、分散式演算法、 cic濾波器、直接數字頻率合成（ dds ） 、 cordic演算法。 -
The carrier wave is modulated directly by the baseband signal at several frequency point in l band and s band. firstly, this paper clarifies the theory of i / q modulation, elaborates evm and acpl, and analyzes the effect of amplitude and phase unbalance and dc offset on evm. secondly we review the basic principle of phase locked loop and it ’ s composing parts, including the basic conception and design method of pll frequency synthesizer, especially introduce the charge pump pll frequency synthesizer in detail
首先，在闡述i / q正交調制基本原理的基礎上，通過對誤差矢量和鄰近通道功率泄漏的詳細分析，定性、定量地討論了各種非理想電路因素（如相位不平衡、幅度不平衡、直流偏差等）對調制器性能的影響;其次，介紹了鎖相環的工作原理和基本組成部分，包括鎖相環的設計和環路濾波器的設計，特別詳述了電荷泵鎖相頻率源;第三，介紹了採用直接調制技術模擬衛星信號的射頻前端的設計;最後，對整個直接射頻調制系統進行測試，結果基本上達到了課題要求。 -
Eddy - current sensor conversion circuit consist amplification circuit, band - pass filter circuit, demodulation circuit, differentiation phase and data sampling circuit. these circuits are used to convert the test signal of eddy - current sensor to discrete signal tend to process. the microprocessor system that formed of dsp chip is used to data fitting of test system, data displaying and data communicating with personal computer, etc. the interference questions of hardware design and the measure of eliminating interference signal in the subject are introduced in the last of this chapter
硬體電路的設計主要分三大部分來實現：激勵源電路部分，由分頻電路和頻率合成電路組成，產生頻率穩定的激勵信號以確保檢測任務的正常進行；傳感器變換電路部分，由放大電路、濾波電路、檢波電路、鑒相電路和數據採集電路組成，主要將電渦流傳感器檢測線圈檢測到的信號變換成只含有被測信息的離散信號，易於后續電路處理；由dsp晶元構成的微處理系統，主要完成檢測系統的數據擬合、顯示及與主機通信等功能。 -
Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。 -
Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method
在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。 -
At the aspect of hardware design, it adopts pulse distributor and the technology of single polar voltage drive to accomplish the function of controlling and driving stepmotor ; it adopts the technology of pulse width modulation and cmos h - bridge drive to accomplish the function of controlling and driving dc servomotor ; it adopts d / a convertor to accomplish the function of controlling ac transducer ; it adopts the technology of digital phase detection to accomplish the function of detecting the feedback position signal of induction phase shifter ; it adopts dsp ’ s capture cell to accomplish the function of detecting the feedback position signal of photoelectric coder
硬體方面，採用脈沖分配器和單極性電壓驅動技術實現了步進電機的控制和驅動功能;採用脈寬調制技術和cmos互補h橋驅動技術實現了直流伺服電機的控制和驅動功能;採用d / a轉換器實現了交流變頻器的控制功能;採用數字化相位檢測技術實現了感應移相器位置反饋信號的檢測功能;採用dsp的捕獲單元實現了光電編碼器位置反饋信號的檢測功能。 -
Then in allusion to biased momentum wheel system, based on classical control system a pid controller was design about pitching channel. according to specialty of roll - yawing channel, this paper discuss long - time cycle movement and short - time cycle movement. when design the control method of long - time cycle movement, whiff thruster is used to assistant the control system. when design the control method of short - time cycle movemen, in order to sovle the problem of coundn ’ t abtain the angular velocity signal, nonminimum phase controller advanced by terasaki is used
然後針對偏置動量飛輪系統，基於經典控制理論設計俯仰通道的pid控制律，根據滾動?偏航通道耦合的特點，分別討論了由軌道角頻率和章動頻率引起的長周期運動和短周期運動。其中長周期運動控制律設計時，結合了噴氣推力控制來輔助偏置動量控制;短周期運動控制中，為了解決不能獲得角速度信號的問題，採用terasaki提出的非最小相位控制器進行控制。 -
We design the qmf based on the criteria of minimum frequency bandwidth and the qmf that possess linear phase, and give a example of a signal decomposed and restructured. 4. in the research of channel dropping filters, we use 5 rank butterworth filter to approach the digital filter. we design lc unpower netwok and rc power network. we manufacture lc lowpass and highpass filter ， and test their performance ; we simulate the appliance of the channel dropping filters in the system
4 .在頻帶分割濾波器的設計方法中，用5階巴特沃斯濾波器逼近最小頻寬正交鏡像濾波器，對無源和有源濾波器進行了模擬設計；設計並製作了無源lc低通和高通濾波器，測試了它們的性能；並對分割濾波器在系統中的應用進行了計算機模擬。 -
Signal phase design
號志時相設計 -
Linear phase prqmf banks is one of focal points in multirate digital signal processing domain, its general pr condition is deduced mathematically in the paper, which is important for further studying its design method, in addition high speed hybrid filter banks adc system, high effective hybrid filter banks adc system and high - speed - and - resolution time interleaved adc system proposed in the paper have practical value
線性相位prqmf濾波器組是當今多速率數字信號處理領域的研究熱點之一，本文從理論上推導出了其理想重建的一般規律，這對進一步研究線性相位prqmf濾波器組設計理論有重要意義。此外，本文提出的高速混合濾波器組adc系統、高效混合濾波器組adc系統、高速高解析度時問交織adc系統，均具有實用價值。 -
Analyze, design and simulate the digital down - convert frequency. first, the analogue if signal is converted to digital if signal in one a / d convertor which used passband sampling theory. the digital if signal is then passed to a pair of digital mixers operating in phase quadrature for mixing the if signal to baseband signal
首先利用帶通采樣定理對中頻模擬信號進行a / d變換后將其混頻到基帶，然後用平方根升餘弦滾降濾波器同時完成低通濾波和匹配濾波雙重作用，以提高解調器的效率。 -
The paper compares some algorithms on rs decoding, makes improvements based on the me algorithm, removes the modifying step in decoding truncate rs code, corrects unsuitable statements in the related papers, and parameterizes the rs decoding module, reducing its area by 20 %. the paper overcomes the signal integration problem in multi - clock design, greatly lowers the phase jitter without area increase, introduces pll to adjust rate for the first time, and parameterizes the module
本文比較了實現rs解碼的幾種演算法，並在me演算法基礎上進行改進，創造性的去掉了縮短碼解碼中的校正環節，糾正了有關論文中的不當論述，並將rs解碼模塊進行了參數化設計，同時也將rs解碼的規模縮小了20 ；克服了多時鐘設計中的信號完整性難題，在沒有增加模塊面積的條件下，大幅降低數據的相位摘要抖動，首次引入鎖相環來調整速率。 -
In this thesis, the signal express format and characteristic of pulse internal phase modulation and pulse external frequency agile is introduced, and the signal design is processed based on the demand of radar system, the restriction of parameter design and various code format
本文首先介紹了脈內調相脈間跳頻信號的表達形式和特點，並根據雷達系統的需求和參數設計的約束條件以及不同的編碼形式進行了信號的設計。 -
In the paper, the design of the real - time test system for crystal parameters is presented. the signal generator of sweep frequency based on dds device ad9852, the signal measuring circuit based on gain and phase detector ad8302, and the real - time control and deal circuit based on tms320vc5416 and the design of high - speed printed digital & analog circuit board are discussed in details
本文闡述了晶振實時測量系統的設計，介紹了以dds晶元ad9852為核心的掃頻信號源電路，以增益相位檢測器ad8302為核心的信號檢測電路，以dsp晶元tms320vc5416為核心的實時控制與運算電路，以及高速數模混合電路板的設計方法。 -
Because multi - band wavelet can describe signal more delicately and more compactly than two - band wavelet, and multi - band wavelet can be derived from the infinite iteration of multi - channel filter banks. by means of a detailed discussion for a effective design method of linear phase pr iir filter banks, the author obtain that the method is only fit for two - channel filter banks, but ca n ' t be extended to arbitrary m - channel ( m > 2 ) filter banks
由於m帶小波比2帶小波分析信號更細致、更緊湊，而m帶小波可由迭代的m通道濾波器組獲得，所以本章分析了一種兩通道線性相位完全重構無限脈沖響應濾波器組的有效設計方法，希望可推廣用於m （ m 2 ）通道。 -
This dual - loop strategy is analysed completly and simulated. the implementation strategy is using digital and analogous hybrid control. the voltage loop is realized by dsp, and the inner - loop is realized by analogous circuit the design of cpld which simplified signal - phase cascade inverter circuit is also introduced in this paper
根據控制方案設計了採用數模混合方案的控制電路，電壓外環採用dsp控制，實現輸出電壓有效值計算、 pi調解、輸出限幅等操作，電流內環採用模擬電路實現，並基於復雜可編程邏輯器件cpld設計了載波移相電路和死區產生電路，簡化控制電路。 -
Study on the design of signal phase based on bus priority intersections
基於公交優先通行的交叉口相位設計方法研究 -
There is a strong relationship between the phase design and signal timing. the paper pays much attention to the expert system of multiphase design
然後利用以關鍵相位為基礎的配時模型進行研究，最終保證多相位信號方案的科學性和準確性。
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