signal processing unit 中文意思是什麼
signal processing unit
解釋
信號處理單元-
Besides tt & c transponder, the power support for pico - satellite also covers cmos camera, data processing unit and energy subsystem, by connecting and charactization which, full course from modulation and demodulation of instruction data to feedback of image data, wireless long - range transmission and the feedback of sidetone signal could be achieved
4 、整個衛星的電系統除了通信一體機外，還包括cmos相機和數據處理單元以及能源分系統。具備了這幾部分，對系統聯試，實現了從指令信號的調制解調和圖像信號的返回的全過程，並且可通過遠距離的無線傳輸。 -
A arming control system of synchronous fitting missle is brough forward in this paper of which the arming control unit composes of the high speed digital signal processing chip dsp and fpga, and has better performance in speed and precision
本文提出了一種雙聯裝導彈瞄準系統，其瞄準控制部分由高速數字信號處理晶元dsp和現場可編程門陣列fpoa構成，使得整個系統在速度和精度方面都具有較好的性能。 -
The development of the signal processing unit in non - contact life - detecting system based on dsp
的非接觸生命探測系統中信號處理單元的研製 -
The 32 - bit cpu core with enhanced multiply accumulate emac unit provides optimum performance and code density for the combination of control code and signal processing required for mp3 decode, file management, and system control. fs2401clqn is a single - chip mp3 audio decoder
當用戶端的pc與存儲媒介之間透過usb 2 . 0介面做資料交換時，因僅需要cpu最低程度的參與，而大多是以硬體處理方式，所以可以達到高速傳輸的目的。 -
In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future
第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga -
With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit
在工程設計方法及結構化設計和高層次綜合的研究中，介紹了在深亞微米工藝條件使用的方法和asic設計流程，討論了高層次綜合的核心如何從描述推出電路構成的設計思路，針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法，給出了用vhdl語言進行代碼設計時的規范和風格，在面向soc的驗證策略討論了動態和靜態的驗證技術，提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。 -
According to the high dispersedness and low precision of measurements when using the traditional time difference method in small diameter and low flow rates conditon, this paper brings forward a new method based on high - speed data acquisition technique. the time difference comes out accurately with high resolving ability of time by using the method and the signal processing algorithms. the developed ultrasonic detection system is composed of two ultrasonic detectors, a transmitting and receiving ultrasonic unit, a high - speed data acquisition unit and a computer
本文針對傳統的時差法在小管徑、低流速測量時，具有測時結果分散性大、測量精度受計數頻率的影響大等不足，創造性地把高速數據採集技術應用在超聲波流量、壓力測量上，用信號處理演算法求時差，使時差成為一個統計量，有效地克服了超聲波傳統時差法測量精度差、不能測量小管徑、低流速流體流量的缺點，提高了時差測量的解析度和精度。 -
General performance requirements and methods of measurement for digital signal processing unit of airborne fire control radar
機載火控雷達數字信號處理單元通用技術要求和測試方法 -
Administrative unit signal processing asp
同步線路管理單元信號處理板 -
A design ot portable digital oscillograph based on dsp is presented. a integrated prototype is composed of high speed data processing module by which signal is digitalized, data processing unit whose core is dsp, general controller as which cpld is used and terminal facility - - lcd
通過高速數據採集模塊將信號數字化，以高性能數字信號處理器tms320vc5402為核心構成數據處理單元，採用高密度的可編程邏輯器件epf6016a設計儀器的系統控制單元，使用液晶顯示器做為終端顯示設備，構成一個完整的示波表樣機。 -
The hardware of the detector consists of a metal oxide micro gas sensor array, gas sampling apparatus and a signal processing unit with high speed soc microprocessor
檢測儀硬體由微結構金屬氧化物氣體傳感器陣列、氣體進樣裝置及高速soc單片機為核心的信號處理電路組成。 -
Floating - point unit is a special microprocessor circuitry unit that deals with floating - point arithmetic operations, which is widely used in scientific arithmetic, cpu, dsp ( digital signal processing ) and image processing, the thesis discusses how to implement high - performance floating - point processing unit based on the research of its implementation algorithm and its implementation structure
浮點運算單元（ fpu ）是處理器中專門進行浮點算術運算的電路單元，廣泛應用在科學計算、 cpu 、 dsp和圖象處理。論文從浮點運算單元的實現演算法和結構的研究出發，討論如何實現高性能浮點運算單元。 -
Using the high - performance digital signal processor ( dsp ) as cpu, the author designs the medium - speed sampling and processing unit of the fault locator. on the one hand, this unit can sample voltages and currents of the line synchronously ; on the other hand, this unit can start the fault locator up and select the fault lines when faults occur
本文作者還以高性能的數字信號處理器（ dsp ）為cpu設計了測距裝置的中速采樣處理單元，該處理單元一方面可以實現線路電流電壓信號的同步數據採集，另一方面可以完成測距裝置的故障啟動和故障選線任務。 -
The system configuration of the fmcw level radar system based on the integrated microwave front unit ( with central frequency of loghz and frequency sweeping bandwidth of 1. 5 ghz ) and the design of the real time signal processing unit based on the 32 - bit dsp - tms320c31 are introduced
然後介紹基於集成微波前端（中心頻率10ghz ，掃頻帶寬1 . 5ghz ）的fmcw液位測量雷達以及基於dsp （ tms320c31 ）的實時信號處理系統設計。 -
Main cpu of instrument adopt digital signal process unit ( arm core ). the hardware design adopt distributing design which separate receiving and processing gps signal from the main system to use professional gps signal from the main system to use professional dsp to fulfill
組合導航儀的主處理器採用高精簡指令集（ arm內核）的數字信號處理器件，硬體部分採用分散式設計，將gps信號的接收及處理獨立出來，採用專用dsp進行。 -
This thesis describes a all fiber optic accelerometer based on t - g double beam interferometer, the whole system include a coherent source whose wavelength is 1310nm, a flexural optic fiber disk act as sensing unit, photodetector, piezoelectric ceramic act as a phase modulator and signal processing circuit. the all fiber optic accelerometer described in the paper has many desirable engineering features which include : broad frequency response ; high sensitivity to measurands ; antielectromagnetic interference and small size
本課題研究的是一種基於泰曼-格林（ t - g ）雙光束干涉儀原理的光纖加速度計，系統主要包括：中心波長為1 . 31 m的ld相干光源、起傳感作用的光纖柔性盤、光探測器（ pin ） 、相位調制用的壓電陶瓷以及信號處理系統。 -
In signal processing circuit, the key of our study, based on methods of mcu + cpld and a / d converter, a time interval measurement unit is done, in which an isp cpld counter is carried out to judge laser pulse for controlling counting and offering signal of time series and control, and a count quantization error measurement circuit which main ramp circuit and 12 bits a / d conversion circuit guarantees the resolution of system
信號處理部分是本文研究的關鍵，採用mcu + cpld的設計方法和模數轉換技術構成時間間隔測量單元的理論基礎，其中用可在系統編程的cpld計數器實現了對循環光脈沖的判斷以開關計數，並提供計數量化誤差測量電路相應的時序和控制信號，用斜坡電路和12位a / d轉換電路完成對計數量化誤差的測量，保證了系統的解析度。 -
The clock and data pulsation signals from upper sensor heads can be received using pin diode, then, amplified and inverted in logical control unit for the purpose of cpu operation. hereinafter, the digital signal will be delivered into the central processing unit ( cpu ) for related calculation, and meanwhile transmitted to a d / a converter for signal recovery after filter and phase - shift circuit
通過採用pin管接收從傳感頭傳遞下來的時鐘脈沖和數據脈沖信號，並將它們放大整形傳送到邏輯控制單元，產生邏輯控制信號，再將數字信號傳送給d / a轉換器，設計了濾波器和移相器電路，還原出了原始的被采樣信號。 -
In control system, system identification and control are calculated by a high speed digital signal processing unit
實時控制中，辨識和控制的計算都由高速數字信號處理器完成。 -
Firstly, the text introduces the general circs of guided weapon and the principle of gfimu theory, then discusses the way, as well as the reason, to design the hardware of the system, which is composed of accelerometer configuration, compensating circuit, signal regulating circuit planning, and signal processing unit designing ; thereon is about software design philosophy, including data acquisition, compensation algorithm, digital filter, gfimu algorithm and data transmission method ; during the design procedure, accuracy and speed are fully been considered ; finally, through experiment and analysis we reveal the problems exist in the system and bring forward the corresponding improvements
論文首先講述了制導武器的發展概況、無陀螺慣性測量的發展和原理，然後詳細介紹了系統各部分硬體的設計思想和設計方法，包括傳感器配置結構、傳感器補償電路、信號調理電路以及信號採集處理單元;文章接下來介紹了系統軟體設計:主要分為數據採集、補償演算法、濾波演算法、無陀螺慣性測量演算法和數據傳輸幾個部分。系統設計過程中著重考慮了測量精度和程序執行速度的問題;論文的最後是系統實驗和數據分析，並根據實驗中發現的問題對現有系統作了進一步的改進。
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