simulation of logic array 中文意思是什麼
simulation of logic array
解釋
邏輯陣列模擬- simulation : n. 假裝；模擬；裝病，裝瘋；【生物學】擬態，擬色。
- of : OF ＝Old French 古法語。
- logic : n. 1. 邏輯，理論學。2. 推理[方法]；邏輯性，條理性。3. 威力，壓力，強制（力）。
- array : vt 1 打扮，裝飾。2 使…列隊，排列。3 提出（陪審官）名單，使（陪審官）列席，召集（陪審官）。n 1 整...
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In addition to the dram array, the logic circuitry with the body - bias - controlled soi transistors has been developed for high - speed operation. combine some new techniques for power reduction and our dram array, we design a new low - power soi cmos dram structure and study the performance of our circuits. the results we got in the simulation and test are valuable
第三種，為了簡化soi材料的電學性能測試結構，使它的測試，分析，計算摘要與傳統的mos模型相兼容，我們通過引入一個耦合因子，將傳統的mos模型的測試方法，公式引入soi材料的c v ， i刁測試過程。 -
Based on the requirement of the data storage of aerospace craft, the purpose of this dissertation is to study the high speed solid - state storage technique interface logic with compactflash card array. the design scheme of a suit of high speed solid - state storage system used with ti " tms320vc5402, lattice " isplsi 3448 and sandisk compacflash card are expatiated. in addition, the paper also gives the material realization scheme of the experiment circuit and interface logic simulation analyzing
本論文以高速cf卡陣列固態存儲技術的介面設計為主要內容，闡述了利用ti公司的tms320vc5402 、 lattice公司的isplsi3448 、 sandisk公司的compactflashcard等組成的高速cf卡陣列固態存儲系統的設計方案，並給出了實驗電路實現方案和介面邏輯的模擬分析。
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