standard chip 中文意思是什麼
standard chip
解釋
普通晶片-
According to the m1l - std - 883c standard of thermal cycle loading, the delamination propagation rates at the interface between chip and underfill were studied experimentally by using c - mode scanning acoustic microscope ( c - sam ) for two types of flip chip packages with different states of solder joint
採用mil - std - 883c標準，通過溫度循環實驗，使用高頻超聲顯微鏡（ c - sam ）無損檢測技術，測量了在不同焊點狀態下， b型和d型兩種實際倒裝焊封裝晶元與底充膠界面分層裂縫傳播速率。 -
Blackfin533 is the new multimedia chip of ad incorporation. the study on h. 264 standard and its implementation on blackfin533 is important to the application of video techniques on embedded system
Ad公司推出的blackfin系列dsp晶元是針對視頻技術而開發的專門晶元，因此，研究h . 264視頻標準並研究其在blackfindsp上的應用對視頻技術在嵌入式領域的應用研究有重大意義。 -
In this paper, we combine the standard modules realize the boundary scan of estarl and also expand it to the test of internal circuit. this structure can save the i / o port of the chip and simplify the testing program
本文結合標準模塊設計實現了estar1的邊界掃描結構，並進行了擴展，應用到晶元內部測試，節約了測試i / o口消耗，簡化了測試過程。 -
Fixed tantalum chip capacitor style 1 protected - standard capacitance range
帶保護1型鉭片式固定電容器.標準電容量范圍 -
Standard test method for iron chip corrosion for water - dilutable metalworking fluids
水溶性金屬加工液的鐵片腐蝕標準試驗方法 -
In this paper, the method of digital evolvable hardware is studied based on the dynamical reconfiguration of field programmable gate array ( fpga ). in the paper, firstly, the basic conception and theory of ehw are roundly introduced and the structure characters of ehw chip are analyzed. secondly, the thought of standard evolutionary algorithm is discussed and the flow of improved evolutionary algorithms is analyzed
本文首先較全面地介紹了硬體演化技術的基本概念和原理，分析了演化硬體晶元的結構特點；其次，討論了標準演化演算法的思想並對改進型演化演算法的流程進行了分析；然後著重分析了演化硬體實現中的關鍵技術，對其實現方案進行了深入的研究，文中分別採用外部演化和內部演化兩種方式對不同的應用電路進行了演化。 -
The chip and its operating system have attained the highest standard, itsec e6, by the information technology security evaluation and certification scheme in europe
晶片和有關的操作系統已獲歐洲資訊科技保安評估及認證計劃評定為達到資訊科技保安及評估及認證最高的標準-第六級。 -
The chip and its operating system have attained the highest standard, itsec e6, by the information technology security evaluation and certification scheme in europe. the panel of judges commented that smartics was comprehensive and included more than 20 innovative security features
晶片和有關的操作系統已獲歐洲資訊科技保安評估及認證計劃評定為達到資訊科技保安及評估及認證最高的標準-第六級。 -
Mems optical switch for optical communication is fabrication by silicon surface micromachining technology. surface micromachining technique, based on the standard cmos processes, in the other hand, offers greater flexibility for realizing free - space optical systems on a single chip
Mems光開關是採用表面微細機械加工技術製作而成，硅表面微機械加工技術是以cmos集成電路工藝為基礎的，它可以靈活地把光開關集成在一塊矽片上。 -
Based on the demonstration in the project target and the technologic support, the hilss is completely constructed, which is a tightly coupled multi - processor system composed of a standard personal computer, a high - performance single chip microprocessor system and a fast - running floating point dsp system. the debugging of the outside ecu will become easier by the friendly graphical user interface, and the high - speed signal transfer through all the parts. besides, the hilss can be expanded conveniently for its modular components
在這一系統中， pc上位機、單片機和dsp系統通過共享存儲器構成了一個緊密耦合的多處理器平臺，友好的圖形化用戶界面、高速的信息採集和控制響應、模塊化的系統功能構成為外部電控系統的調試創造了良好的開發環境，同時也為系統今後進一步的擴展奠定了扎實便利的基礎。 -
Now, with the rapid development of computer and electronics, there have been a great progress in the field of input / output device technology. among this field, pci has been a current standard interface of pc. and in order to accommodate the development of operating system, wdm has been a driver model adopted by industry generally. at the same time, in the respect of sensor ’ s application, a high precision and high integrated incremental rotary encoder has been an outstanding one among the displacement sensors. meanwhile, eda technology and cpld / fpga chip applied in the signal processing circuit are approved by a great number of engineers who are engaged in designing the electronic device
目前，隨著計算機技術和電子技術的飛速發展， i / o設備介面控制技術領域有了長足進步。其中， pci介面成為主流的微機標準介面，而與操作系統平臺的發展相適應， wdm已成為業界普遍採用的驅動程序模式;同時，在傳感器應用方面，高精度、高集成的增量式旋轉編碼器已是位移型傳感器中的佼佼者，而eda技術和cpld / fpga器件在信號處理電路中的應用被廣大電子設計人員所認可。 -
This product is a full electron construction in which its front - end adopts pressure sensor with baffle filled oil chip. output signal is sent the data to microprocessor from high - precision, low temperature drift and high - reliability amplification circuit and a d convert circuit, after operating, to transform by high - precision d a convert circuit into standard signal output
該產品為全電子結構，前端採用帶隔離膜充油芯體的壓力傳感器，輸出信號由高精度低溫漂和高可靠性的放大電路和模數轉換電路將數據送入微處理器，經運算後由高精度數模轉換電路變換為標準信號輸出。 -
Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function
本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。 -
The entire process of building a sound chip is fully compatible with the standard industry process for semiconductor manufacturing, called complementary metal oxide semiconductor, or cmos
聲音晶片的全部製程，是完全相容於互補式金屬氧化物半導體（ cmos ）的工業標準製程。 -
Wide plus fyd multi - channel wind pressure measure transmitter employ import high precision and stability chip, and adopts surface treatment technology of special aluminum alloy and stress isolated technology in the sensor transfer differential pressure signal into ma dc standard signal by precise temperature compensation and amplification treatment
Wideplus - fyd系列多路風壓測量變送器是選用進口高精度高穩定性晶元，並採用特殊鋁合金表面處理技術和傳感器應力隔離技術，經精密溫度補償及放大處理，將差壓信號轉換成420 ma dc標準信號。 -
Wide plus ds series single - channel wind pressure measure transmitter employ import high precision and stability chip, and adopts surface treatment technology of special aluminum alloy and stress isolated technology in the sensor transfer differential pressure signal into ma dc standard signal by precise temperature compensation and amplification treatment
Wideplus - ds系列單路風壓測量變送器是選用進口高精度高穩定性晶元，並採用特殊鋁合金表面處理技術和傳感器應力隔離技術，經精密溫度補償及放大處理，將差壓信號轉換成420 ma dc標準信號。 -
European standard en 1550 prescribes the use of static chucking force measuring devices in order to make the chucking and chip removal processes safe
歐洲en 1550標準對使用靜態夾緊力測量儀測量自動定心卡盤做出了規定，保證夾緊狀態和切屑清除過程的安全。 -
Compared with the similar research results, the weighted control ic here has the following characteristics : ( 1 ) the circuit structure is simpler ; ( 2 ) the chip ' s fabrication is compatible with standard cmos process ; ( 3 ) n - mosfets with high w / l ratio and short channels are used for weighting and output to reduce the insertion loss ; ( 4 ) the weighting factor varies in a relatively wide range with the controlling signals ; ( 5 ) input and output impedance approach 50 in low frequency ( e. g. 50mhz ), while in higher frequency they slightly deviate from 50, hence the energy reflection lower than 0. 1 ; ( 6 ) it completes the functions of sampling, weighting, controlling and summing of high frequency analog signals
它的加權控制電路與已報道的相關電路相比具有如下特點：電路結構簡單；製造工藝與普通cmos工藝兼容：短溝道，高寬長比的nmos晶體管具有低的通導電阻，將其作為加權、輸出器件可降低由電路引起的插入損耗；改變加權信號，可實現權值在較大范圍內的連續變化；輸入、輸出阻抗在低頻（如50mhz ）下接近50 ，而在高頻下略有偏離50 ，但反射系數均低於0 . 1 ；實現了對高頻信號的取樣、加權、控制、疊加功能的迭加。 -
The basic principle of natural gamma - ray log is stated, the developing background, developing ways and developing situation of natural gamma - ray tools are introduced. the researching task of the paper is presented through analyzing the using situation and questions exsisted in inner natural gamma - ray tools, the researching work is started from three aspects, they are logging tool development, reliability design and reliability assuring methods, and the data processing methods, in the course of logging tool development, instrument indexes are presented based on the compatible property of sookbps telemetry system and environmental property, the analog measuring chanel and the interface circuit which realizing the compatible performance are designed according to the instrument mdexes. the detecto * design. the plateau property testing of the detector and the analysis of it ' s affecting factors are stated, the measuring property of the tool is discused, a new type of single chip microcomputer is selected when designing the interface circuit, and the laboratory experiments has fulfiled conmunieating standard signals between the interface circuit, the universal interface unit of sookbps telemetry system and also 500kbps telemetry system
本文首先概要介紹了石油測井的基本概念、方法、條件、最新進展、以及應採取的研發對策，論述了自然伽瑪測井的基本原理，介紹了自然伽瑪測井儀的發展背景、發展歷程和發展現狀，通過分析國內自然伽瑪測井儀的使用情況和存在的問題，提出了本文的研究任務。研製工作從測井儀研製、可靠性設計與可靠性保障技術、數據處理方法研究三個方面展開，在測井儀研製過程中，根據500kbps遙傳系統要求的配接性能和使用環境特徵，提出了主要儀器指標，並根據這些指標，設計了儀器模擬測量通道和實現這一配接性能的介面電路；論述了探測器的設計、坪特性影響因素分析及其測試，探討了儀器的測量性能；在設計介面電路時選用了新型單片機晶元，並與500kbps遙傳通用介面單元rtu 、 500kbpa遙傳系統實現了室內配接。 -
The serializer and deserializer moduls in the ftlvds chip are designed by the way of standard cell design approach. the paper emphatically discusses the tradeoff and the implementation of several clock synchronization modes and circuit structures, and makes a lot of verilog simulation and verification on the circuits designed
串並模塊串列化器和解串列器採用標準單元的方法設計，論文討論了對幾種時鐘同步模式以及串並轉換電路結構的權衡和實現，並對所設計的電路結構進行了verilog模擬驗證。
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