subtraction circuit 中文意思是什麼
subtraction circuit
解釋
減法電路- subtraction : n. 減去，扣除 （from）; 【數學】減法。
- circuit : n 1 （某一范圍的）周邊一圈；巡迴，周遊；巡迴路線[區域]；迂路。2 巡迴審判（區）；巡迴律師會。3 【...
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An improved high - resolution current - mode sorter is presented. its structure complexity is o ( n ), which is crucial to the expansion of its size, and its dynamic range is large. only one clock signal and one reset signal are needed. no biasing signal is required. the operation point is constructed according to the input current, so it is self - adaptive, which is very important for an all - purpose component. in average value circuit, subtraction circuit, winner - take - all ( wta ) circuit and control circuit, it has good performance even at a large input current. this sorter has high precision, high resolution and low power, as has been proved via hspice simulation. it can be implemented in the standard digital cmos technology and widely used in many fields, so it is of great value in applications
提出了一種改進的高精度電流型排序電路.它的結構復雜性僅為o （ n ） ，便於擴展;動態范圍大;它是自適應的，工作點由輸入電流確定，故不需要偏置信號，這對作為通用器件使用的排序電路來說是很重要的.通過利用平均值電路、減法電路、 wta電路和控制電路，可以使該電路在大輸入電流下依然保持高性能. hspice模擬表明該電路具有高準確性、高精度、低功耗的特點.它能用標準數字cmos工藝來實現，可以被應用於很多領域，具有很高的應用價值
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