time multiplexer 中文意思是什麼
time multiplexer
解釋
時分多路復用設備- time : n 1 時，時間，時日，歲月。2 時候，時刻；期間；時節，季節；〈常pl 〉時期，年代，時代； 〈the time ...
- multiplexer : 多工器
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This is one kind project of hardware multiplexer based on the high - performance system on a programmable chip ( sopc ). in the project author integrate with the software and the hardware on a field programmable gate array ( fpga ), not only simplifying the overall system design, moreover realizing stably, high speed, low cost multiplexer ’ s design. the dissertation carry on three verification step that include function verification 、 time verification and prototype verification to guarantee each ip can work normally to satisfy the system performance requirement. then author introduce the realization of the multiplexer in detail, as well as the test and the debugging questions met in practice and solution of the questions
本方案是一種基於可編程片上系統（ sopc ）的硬體復用器設計方案，其特點是將系統的軟體和硬體集成在一款現場可編程門陣列（ fpga ）上，使用該方案不但簡化了整個系統，而且實現了穩定、高速、低成本的復用器設計。對系統中各個功能模塊的整合和驗證採用功能模擬、時序模擬、原型驗證三個步驟進行，保證系統中各個功能模塊可以正常工作，並滿足系統的性能要求。然後詳細介紹了復用器的實現，以及測試和調試中遇到的問題及解決方法。 -
Second, at the multiplexers there must be additional schemes to reconstruct the original packet from the cells. and the delay time of the last cell of the packet will greatly influence that of the original packet. we propose the de - multiplexer and the multiplexer algorithms in the architecture of parallel packet switches ( pps ) which support the variable - length packet switching
文章給出了一種多平面交換的輸入端分發演算法，支持變長數據包的分發，同時也給出了輸出端復接的演算法，可以進一步減少數據包的時延，提高多平面交換的效率。 -
This master ’ s degree thesis firstly introduces and discusses the principle of synchronization in sfn ( single frequency network ) based on dvb - t focusing on some key points, then presents a design of sfn time synchronization system based on fpgas, including the modules of sfn adapter after the mpeg - 2 re - multiplexer and sync system serving as the front - side of the dvb - t modulator at transmitters
本論文首先介紹並討論了dvb - t單頻網的時間同步原理，對其中的一些關鍵問題做了詳細的分析，在此基礎上提出了一種基於fpga的dvb - t單頻網時間同步的硬體設計方案，即位於mpeg - 2系統層復用器之後的單頻網適配器和發射臺調制前端的同步系統的fpga設計。
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