transistor chip 中文意思是什麼
transistor chip
解釋
晶體管片- transistor : n. 【無線電】晶體（三極）管；晶體管[半導體]收音機。 a transistor radio 晶體管[半導體]收音機。
- chip : n 1 碎片，削片，薄片；碎屑；薄木片；無價值的東西。2 （陶器等的）缺損（處）。3 （賭博用）籌碼；〈p...
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Increasing the window size and the issue width to extract more ilp may hinder from achieving high clock speed, limiting over - all performance, especially for the forthcoming billion - transistor per - chip era
在這種情況下，再增加動態指令窗口的體積和發射寬度將無助於高主頻的實現，難以開發更高的ilp ，獲得整體性能的提升。 -
A modern power electron power component igbt ( insulate - gate bipolar transistor ) is used as the main power switch component of power converter. it takes 80c196mc single - chip as core processor
電源變換器的功率開關器件採用現代電力電子功率器件igbt （ insulategatebipolartransistor ，絕緣柵雙極型晶體管） ，控制系統以80c196mc單片機作為控制核心。 -
Adopts domestic advanced technology, imported transistor and heat emitting chip, has high reliability, stability and performance. improved the products working ability in bad condition, can be compared with imported ones
產品採用國內先進工藝，進口晶體管和良好的散熱片，保證了產品的可靠性和穩定性，提高了產品性能指標，增強在惡劣環境下工作的能力，並與進口產品相併論。 -
In the paper, an automatic macro - cell routing system, which bases on the architecture of three levels : chip, macro - cell and transistor group, is discussed
本文基於晶元、宏單元、晶體管群三級的層次化架構，實現了一個宏單元自動布線系統。 -
These devices include paper, tape, disc, vcd, semi - transistor storage device, integrated circuit chip and any other form which has the capacity to store information
載體包括紙張、磁帶、磁盤、光盤、半導體存儲器、集成電路板卡以及其他可存儲計算機軟體的載體。 -
Ibm journal of research and development, 2000 offers great background on challenges facing chip designers, and how and why cmos have displaced bipolar transistor designs note especially table 1 !
， 2000年）則對晶元設計以及cmos如何取代和為什麼要取代二極體的問題給出了大量的背景知識（特別要注意其中的表1 ） 。 -
A silicon self - aligned technology was achieved by using a smart power integrated technology to get high power of the circuit. vertical pnp transistor whose base is epitaxy layer was used as output. the collector of the vertical pnp transistor was set on the back of the chip with low resistance p + substrate as ohm contact
在工藝中，採用了smart功率集成技術實現電路的大功率，基區是外延層的縱向pnp晶體管作為輸出，將集電極置於晶元背面，採用低電阻率p ~ +襯底作為歐姆接觸。
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