two-circuit system 中文意思是什麼
two-circuit system
解釋
雙管路系統-
This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga
本課題主要針對星載并行計算機體系結構及軟體結構的特點，從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究，提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究，提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略，同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術，提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案，實現該方案所需增加的電路少，可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。 -
In the experimental system apd transferred laser pulse to weak electrical current. after two - level amplification we got a voltage pulse that had a enough amplitude to be applied, the timing point was discriminated by the constant - fraction timing discriminator circuit. timing circuits transferred the pulse flight time to digital signal accurately
實驗系統採用apd作為光電傳感器，將激光脈沖信號轉變為微弱電流脈沖，經過兩級放大后，信號變為幅度較大的電壓脈沖，經過時點鑒別電路分別確定計時起點和終點后，由計時電路來精確測量兩個時間點之間的時間間隔。 -
Smart antenna has two critical tasks, one is to filter the uplink signals, and the other is to form the downlink beam, and we need adaptive algorithm and digital signal processing ( dsp ) technology to fulfill these work. adaptive algorithm is one of the most important technologies of smart antenna, and it determines smart antenna ' s speed to the wanted to signal and the complexity of the circuit of the communication system
自適應演算法是智能天線的核心技術之一，它決定著智能天線對來波信號響應的速率和系統實現電路的復雜程度，系統需要針對各種通信環境來選擇合適的演算法，也可以採用演算法分集的方法來使整個系統工作在最佳狀態。 -
In recent years, with the rapid development of the millimeter - wave radar technology and the demand of the safety, anticollision radar system is being studied and used widely. the if ( intermediate frequency ) circuit and the digital signal processing are two important parts of it
隨著毫米波雷達技術的日益成熟和人們對安全性的迫切需要，近年來，防撞雷達系統得到了深入研究和廣泛應用，如自動巡航控制、碰撞報警和防碰撞系統以及有待發展的雷達成像和汽車的自動駕駛系統等。 -
The study has completed the design of two - phase inverter and made up of the two - phase inverter - motor system for experimental use it is a variable frequency adjustable speed system with a open - loop control of rotational speed, which consists of voltage - controlled oscillator circulating assign device inverter circuit and two - phase induction motor a accurate mathematical model is set based on the whole system, and simulator program of dynamic and steady condition is established, which is used to calculate the dynamic and steady performance by kron and symmetrical coordinate converter by simulator calculation and experimental research with specific parameter of the system, a comparison is made between predicted and experimental characteristics, experimental measurements are shown to compare closely with corresponding theoretical result it is compared with some variable frequency adjus table speed system comprising inverter and single - phase induction motor from the system efficiency torque pulsation and the effect of two - phase inverter capacitance based on the conclusion, harmonic cancellation pulse width modulation control of a two - phase inverter - fed induction - motor drive system is researched, which cancelled the low harmonic and improve the system performance
通過對電機的kron變換和對稱分量變換，建立了系統較精確的數學模型，編制了系統動態及穩態運行的模擬計算程序分別計算系統的動態和穩態性能。通過對系統的具體參數進行了模擬運算和實驗研究，實驗和模擬結果進行比較，說明實驗和理論較為一致，並從系統效率、轉矩脈動及兩相逆變器電容的影響等方面與各種逆變器和單相異步電動機組成的變頻調速系統加以比較。在此基礎上，對兩相逆變器供電-異步電動機系統使用諧波抑制pwm控制進行了研究，由於減少了低次諧波，改善了系統性能。 -
The precise clock source is crystal oscillator made of 74hc04 ; the mute circuit can conceal the error and solve the problem of noise ; the antenna switching circuit in the receiver is to select one antenna from two which receives signal better. it can improve the quality of the receiving audio signal, restrain the noise effectively and promote the system performance
高精度的時鐘源是由74hc04構成的晶體振蕩器;靜音電路將出錯的音頻信號進行差錯掩蓋，很好地解決了噪聲問題;接收機採用兩副天線切換工作，提高了音頻信號接收質量，有效地抑制干擾，提升了系統的性能。 -
The stability of electric power system has been being focused for a long time toprevent a power system from losing synchronism after sudden fault ， researchers have done much work and got many accomplishments this paper applied the direct feedback linearization ( dfl ) technique on the power system ， a strong nonlinear system simulation results by matlab proved this method efficiency main works and results are as follows ： this paper compared some existing methods in excitation control ， fast valve control and coordinated control respectively, analyzed the developments and actuality of nonlinear control research in brief, illustrated why ransient stability could be greatly improved by using the fast valve control in chapter 3 ， indicated the importance of coordinated control farther this paper introduced the inverse system theory, based on which ， discussed the dfl theory, pointed out which had consistency with the inverse theory, expanded the dfl theory combined the idiographic model equations ， made which adapt to the model of a single machine - infinite bus power system this paper referenced abundance articles and educed a set of equations ， which could describe the dynamical process of excitation and fast valve control for synchronous generators in the equations ， there were several very important parameters of power system - - rotor angle ( ) ， rotor speed ( ) ， generator q axis voltage ( eq ) ， transient voltage ( e ' q ) ， active power ( pe ) ， mechanical input power ( pm ) ， valve opening ( ) ， generator terminal voltage ( vt ) ， based on the model ， nonlinear coordinated controller and terminal voltage optimal controller have been designed by using the expanded dfl theory and lq optimal control theory the simulation results showed that the controller could keep power system transiently stable under the effects of a symmetrical 3 - phase short circuit fault ， which achieved better postfault regulation compared with another two routine methods ， one is the proportion excitation controller and proportion fast valve controller, the other is the proportion excitation controller and the optimal fast valve controller, which could exert good performance when met 1ittle disturbance either
在介紹逆系統理論的基礎上，詳細介紹了dfl理論，通過比較闡明了dfl理論其本質是逆系統方法的一類，並結合具體課題推導出的模型方程將dfl理論進行了擴展，使之適應于電力系統這個強非線性對象。通過參考大量的書籍文獻推導出一套實用的可將大型汽輪發電機勵磁與汽門綜合起來進行控制的模型方程，此模型方程涵蓋了電力系統中特別引人注目的幾個量- -轉子角、轉子轉速、發電機q軸電勢eq 、暫態電勢e ' q 、有功功率pe 、機械功率pm 、汽門開度、機端電壓vt ，在此基礎上建立了實用的電力系統簡化的數學模型，並將擴展的dfl理論應用於此模型系統，結合線性二次型最優控制理論設計出大型汽輪發電機的非線性綜合控制器及機端電壓最優控制器，通過模擬實驗與採用常規的按電壓偏差進行調節的比例式勵磁控制器+汽門比例控制及採用常規的按電壓偏差進行調節的比例式勵磁調節器和基於二次型性能指標設計的最優快控汽門（考慮發電機的飽和因素）進行了對比，證實了採用此種控制器可以有效地提高電力系統的暫態穩定性，並且在電力系統遭受小干擾時同樣具有良好的調節性能。 -
In the design, we make use of two eda tools max + plus ii and protel99. because of the using of complex programmable logical device ( cpld ), we can keep untuched the original hard circuit in design and realization of counting card, so it inherited the advantage of its predecessor. in order to quantitatively analyze the performance of data acquisition system with fifo cache, we introduced the queueing theory to build mathematic model to test its quality
在設計中藉助了max + plusii和protel99兩個eda設計軟體。由於採用了復雜可編程邏輯器件cpld ，使得在計數卡的設計和實現中不用更改原硬體電路，對原設計的優點有很好的繼承。在驗證系統改進性能時，引入排隊論建立了數學模型對系統的工作性能進行定量分析，證明其達到了設計要求。 -
This paper presents two new electric system devices, a grounding and short - circuit fault indicator and an intelligent hybrid dc contactor. the fault indicator may be used in mid to high voltage power system
其中，短路與接地故障顯示裝置可用於檢測中、高壓電力系統短路或接地故障，該裝置具有強弱電隔離、安全性好、安裝方便、能耗低、成本低的特點。 -
The design of high - voltage circuit based on pwm technology is briefly described. the closed - loop current control theory using analog instruments is fully discussed, followed which is that using digital instruments. it is an important part that the hardware and software design of the single chip - two arms and two chips - two arms current control circuits with a new chip applicable to digital current control system
簡單介紹了基於開關電源技術的高壓電路設計；詳細講述了模擬穩流電源的閉環穩流原理，並在此基礎上討論了利用數字電路實現穩流的原理及可能性；選擇出適合數字穩流系統的新型晶元，完成了單片雙路穩流系統、雙片雙路穩流系統的軟硬體設計；給出了一種簡單易實現的比例?積分控製程序。 -
The whole part of the data acquisition is build in a computer as two data acquisition cards. they are front card and rear card. the front card composed of four modules. they are : coin circuit module, data flow controller module, sdram array module and system bus interface module. the rear card composed of four odules. they are : asynchronous serial port interface module, adc control odule, ecg signal process module and gate control data produce module
數據採集模式實現部分的大部分工作是在前面板上完成的，後面板主要是一些外圍電路。前面板採集卡上從物理上來說主要有四塊電路:符合電路，數據流控制器電路， sdram陣列和系統總線介面電路組成。後面板採集卡從總體物理上主要有四塊電路組成: 485串列通信電路， adc控制電路，心電數據處理電路和門控信號產生電路。 -
This paper presents the upgrade and modification design of the sl - 3000 model digital - controlled logging system, which consists of two important modules - communication control module and acoustic wave vdl ( variable density logging ) module. the working principle of these two modules, hardware architecture, circuit design and the implementation of the pci interface are also expatiated
本文介紹了sl - 3000型數控測井系統中兩個重要的模塊? ?通信控制模塊和聲波vdl模塊的升級改造設計，具體闡述了這兩個模塊的工作原理、硬體構成、電路設計以及pci介面的實現。 -
It also calculates theoretically the minimal time interval between two trains in quasi - moving - block signaling system and recommends approximate values for the length of coded digit track circuit. the rapid development of urban rail transit demands a deep understanding on the features of track circuit
在此基礎上，針對當前應用廣泛的基於數字軌道電路的準移動閉塞atc系統進行了重點分析，詳細討論了數字軌道電路的原理、準移動閉塞系統的列控方式等內容，並對準移動閉塞下的最小列車追蹤間隔時間進行了理論計算和分析，給出了數字軌道電路長度的推薦值。 -
A novel high - power pollution - free smps is presented in this paper, which accomplishes simultaneously the goal of soft - switching pwm, the input / output isolation, the output voltage regulation and three - phase pfc with a single - stage power processor and simple pseudo - phase - shift control circuit. therefore, compared with the normal two - stage system, the single - stage power supply has simpler structure, lower cost, higher efficiency and easier to control. the proposed smps can be used in the three - phase power system, and can output high power over kw - order and input / output ( i / o ) isolation dc power supply
本文提出的新型無污染大功率開關電源正是採用三相三線制輸入電源，利用單級偽相移零電壓零電流開關脈寬調制（ pps - zvzcs - pwm ）全橋變換器完，成功率因數校正（ pfc ）和輸出電壓快速調節、隔離的雙重功能，並且該變換器開關管在零電壓或零電流下通斷，顯著的減小了emi 。 -
The quantum gate array is the natural quantum generalization of acyclic combinational logic " circuit " studied in conventional computational complexity theory. in 1995, barenco showed that almost any two - bit gate is universal, so building a feasible two - bit logic gate is the first step to engineer a quantum computer. in principle, the quantum bit can be carried by any two states system
在眾多的量子計算機模型中目前討論最廣泛的是量子計算機門組網路模型，量子計算機門組網路模型是經典計算機門組網路結構的量子推廣，它是根基於barenco等人所證明的「一個兩比特受控操作和對單比特進行任意操作的門可以構成一個『通用量子邏輯門組』 」之上的。 -
Based on a comprehensive research of image coding algorithm for correlation vq, novel algorithms are presented on two aspects in this paper, and corresponding vlsi coding circuit system is designed, simulated and verified
本論文在對相關矢量量化圖像編碼演算法進行深入分析的基礎上，在兩個方面提出了基於vlsi技術的新演算法，並進行了vlsi硬體設計、模擬模擬和時序驗證。 -
It is the first time that driving chip used by pdp is applied to the fed panel. by adopting the new ic and the novel driving method, the developed grey scale modulator achieve high flexbility, stability and high integration. the circuit system includes cyclonetm fpga from altera and stv7610 from st microelectronic. with the capability of generating two kinds of modulating waveform, it has the advantages of flexible configuration, high display - quality, high integration and low cost. fpga design is based on the quartus platform. data transforming and the system controlling are achieved by using single fpga
基於altera公司cyclone系列fpga和st公司stv7610驅動晶元設計的fed顯示器的灰度調制電路系統可以支持兩種調制波形，具有配置靈活，顯示性能好等優點，其集成度為原有系統的三倍，且造價更低廉;基於quartusii軟體平臺進行了fpga的系統開發與優化，採用單片fpga完成了全部的數據轉換和系統控制功能， fpga的可編程特性使系統的設計具有充分的靈活性和可擴展性。 -
To succeed in design control circuit based on c51 series single - slice computor with two line system, low power consumption and strong function according to the requirements of intrinsically safe explosion - proof ( ib ct5 ) ; 3
2 、按照ib ct5防爆等級的要求，設計研究成功二線制、低功耗、處理功能強的基於89c51系列單片機的控制電路。 -
The image data are stored and exchanged under an " interruption & dma " parallel mechanism, which can run simultaneously with dsp unit. two different voltage power resources are provided for the whole system, which are watched by one surveillance circuit. system anti - jamming and system optimization measures are added into system for future circuit debug
視頻採集單元採用philipssaa7111及fpga晶元，以標準視頻信號（ pal或ntsc ）為輸入，通過fpga及i2c總線，對圖像數據進行剪裁及採集；採用兩幀存儲體輪換工作機制，省去fifo器件，降低成本；採用"交叉連續"地址存儲空間，便於dsp進行dma傳輸。 -
Capacity variation of two capacitance of measuring membrance is also proportion to pressure. by amplified circuit the would be linearly converted to 420 ma dc two wire system current voltage or digital hart output signal high - speed addressable remote sender data road
測量膜片的兩電容固定極板的被放大電路線性地轉換成420ma dc的二線制電流電壓或數字hart高速可尋址遠程發送器數據公路輸出信號。
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