very high data rate 中文意思是什麼
very high data rate
解釋
甚高速數據傳送率-
Several years ago, we started heading down this path of saying, " how do we build out an appropriate set of protocols and software for managing very high data - rate data movement over commodity networks and commodity machines ? " we were concerned that the big, expensive smps and big, expensive storage solutions were problematic for grid environments
幾年前，我們最初是這樣說的， 「我們如何才能構建適當的協議和軟體來管理大量數據在網路和機器之間的移動呢？ 」我們當時關注的是又大又昂貴的smp機器，以及同樣大型並且昂貴的存儲解決方案，這也正是網格環境要解決的問題。 -
Very high data rate dsl
超高速數字用戶迴路 -
The network interface uses a very high data rate digital subscriber line vdsl
網路介面使用超高數據速率數字用戶線路（ vdsl ） 。 -
Very - high - data - rate digital subscriber line
甚高數據速率數字用戶線 -
The data - sampling section completes analogue - to - digital conversion using fpga and high speed adc, then transmits these data to processing communication equipment in some format. because fpga has high speed processing capacity, this section can obtain very high sampling rate
數據採集部分採用現場可編程門陣列（ fpga ）作為與模數轉換器件（ adc ）的介面，在單晶元內實現了同步采樣控制、數據編碼傳輸的功能。 -
The technology of very low bit rate for hf ( high frequency ) communication means that, one technology of ecm ( electronic counter measures ) resistant communication is developed for low bit data message exchange in the time of battle which data communication is destroyed by electronic disturber. it is regarded by armies in the battle of information, because that it can overcome the very low snr ( signal noise ratio ), very high narrow - band interference and multipath with maxium delay of fifty millisecond
短波最低限度通信技術是在戰時強電磁干擾情況下能實現保證最低限度的數據報通信的一種抗干擾通信技術。由於其能有效的克服極低信噪比、較強的窄帶干擾和幾十毫秒的多徑，在信息戰中受到各軍高度重視。 -
The vxibus c - size and i, q channels are employed in this module design, and the sampling rate in each channel reaches 500mhz. the memoty deep of the system is 2mb each channel and cpu is high - speed embedded cpu ( powerpc ). the timing and logic function are fulfilled by fpga. after the disscusion of signal adjusted, the detailed scheme of this module design have been showed. in this design, there is much logic function design, and it is very strict with the hardware language program. so the basic flow of hardware program design and several very important methods of high speed logic function design, which is described by vhdl, are introduced. also, expatiated the inner modules structure of fpga for forepart circuit, the keystone and difficulties of the design. the design of high - speed pcb is another difficuty of realizing high - speed data acquisition system, and it is very important. the timing simulating results of several pivotal modules are depicted. high - speed signal paths are terminated to match the characteristic impedance. the design undergoes integrity analysis and software simulation
在本模塊的設計中，有著大量的邏輯設計，對硬體語言程序的編寫要求比較高，因此，文中介紹了硬體程序設計的基本流程，以及幾種基於vhdl硬體語言設計在高速邏輯設計中非常重要的方法。同時闡述了本模塊設計的前端fpga的內部模塊結構，設計的重點、難點，並給出了重要模塊的時序模擬結果。高速pcb的設計也是目前實現高速數據採集系統的難點和重點，文中詳細的闡明了高速pcb設計中的注意點，以及作者在設計本模塊時的經驗和心得。 -
Because computing exactitude contrail is completed after the event by shooting range photic measure equipment, better quality track record to image collected by photoelectricity sensor become a very important work it exists the problem of data transmission rate low in the process of storing data to hd from high frame frequency and great array ccd camera
由於靶場光測設備對目標精確軌跡計算的工作要在事後完成，因此對光電傳感器採集到的圖像數據高質量記錄就成為一項極其重要的工作。從電視測量系統的高幀頻、大陣列的數字ccd像機採集並存儲數據到硬盤的過程中，存在數據傳輸速率低不能滿足要求的問題。 -
Their weights vary with the velocity of the platform and the requirements of the precision and the data - rate of the ins or gps are very high at the beginning the distribution of the space - time spectrum of the clutter is studied
一方面，主瓣雜波的帶寬和斜率隨著掃描方位角的變化而變化；另一方面雜波的二維分佈隨著距離或俯仰角的變化而變化。
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