video signal output 中文意思是什麼

video signal output 解釋
視頻信號輸出
  • video : n. 電視；視頻；影像。adj. 電視（用）的，視頻的，錄像的。
  • signal : n 1 信號，暗號；信號器。2 動機，導火線 （for）。3 預兆，徵象。adj 1 暗號的，作信號用的。2 顯著的...
  • output : n. 1. 產量；生產，出產，產品。2. 【醫學】（糞便以外的）排泄物；排泄量。3. 【電學】發電力，輸出功率；供給量。4. 輸出信號。
  1. Vga chase row output meet all fig image signal output can directness mate fig tv and display entirety dispel coruscate boost menu mass and definition video decode in put tone exceed convulse

    Vga逐行輸出介面，全數字圖像信號輸出，可以直接配接數字電視和顯示器，完全消除閃爍，提高畫面質量及清晰度
  2. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  3. It can separate sync signals from ntsc, pal and secam video signals, and produces composite sync output signal, back porch output signal, horizontal sync signal, vertical sync signal and odd / even field output signal

    它可以對ntsc 、 pal 、 secam制式的視頻信號進行同步分離，獲得所需的同步信號，還能準確地輸出復合同步、后沿輸出、行同步、場同步和奇/偶場輸出信號。
  4. The function of video frequency gathering board is to reveal the compound television signal from the computer to carry on a / d transforms, rgb separation processing and so on, output 24bits rgb signals and the synchronized signals. these functions were finished by video frequency decoding chip saa7111 made by philip corporation

    視頻採集板的功能是利用philip公司的視頻解碼晶元saa7111 ，對計算機顯卡輸出的復合電視信號進行a / d轉換， rgb分離等處理，輸出24位rgb信號和同步信號。
  5. The output of the detector is the video-signal proper, with a 2-volt swing.

    檢波器的輸出是相應的視頻信號、擺幅為2伏。
  6. The video signal processing circuit realizes the primary catching, filtering and signal amplifying. variable threshold binarization processing circuit and two - channel counter are designed to sample to count the output pulse signal, which is processed, deposited and displayed in microprocessor. the communication interface circuit with the computer is also designed

    視頻信號處理電路完成了原始信號的初級捕捉、濾波、視頻放大等處理，設計了浮動閾值二值化處理電路，採用兩路計數器對輸出脈沖信號采樣計數，最後送入微處理器進行運算處理，可實現測量值的儲存、顯示等，並設計了與上位機的通訊介面。
  7. The system generates 18 kinds of worldwide used hdtv test pattern signals supported by smpte 274m standard, and also provides ypbpr, rgb video outputs both in digit and analog and the output interfaces of itu - r bt. 1120 - 2 / gy / t157 - 2000 studio hdtv digital video signal interface standard

    該系統生成了符合smpte274m國際標準的18種普遍採用的hdtv測試圖案信號。它提供ypbpr 、 rgb兩種視頻數字輸出與模擬輸出，其介面符合itu - rbt . 1120 - 2 / gy / t157 - 2000演播室高清晰度數字視頻信號介面標準。
  8. Video - process chips on display adapters always have the digital interface which can support the panel monitor, the output port of most of display adapters only offer the analog signal interface

    雖然當前計算機顯卡視頻處理晶元中一般都有支持平板顯示器的數字視頻介面，但現在大部分的計算機顯卡的輸出仍然只提供模擬信號介面。
  9. In this module, we focus on an improved 2 - d median - filter and a real time edge detect algorithm which has very regular computational structure. in chapter 4, we use fpga to capture the image data from infrared sensor and create the synchronization signal and output the video to monitor. chapter 5 describes the design of communication interface between dsp, fpga and missile control system, and focus on a new verilog description style called cycle accurate, and finally we design an i2c bus using this description style

    本論文按照處理機的工作流程，首先討論fpga與視頻探測器之間的數據通訊模塊的設計，接著介紹了圖像預處理模塊，在預處理模塊中，重點介紹了一種改進的二維中值濾波方法和一種特別適于硬體實現的邊緣檢測演算法;在第四章，討論了用fpga實現圖像獲取和模擬視頻輸出;第五章，討論了fpga與dsp之間以及fpga與彈上機之間的通訊模塊的設計，接著重點研究了一種新的verilog語言的描述風格，並用此寫法在上fpga實現對外圍設備的初始化模塊;最後，對本文所做的工作進行了總結。
  10. Radar signal simulator features economy ， flexibility ， practicality ， etc. it ' s significant to develop radar simulators for radar research and manufacture. this dissertation discusses mainly the analysis of ground clutter spectrum in sum and difference channels for airborne phased array radars ( apar ), and the design of the radar signal simulation resource and the video output of the apar simulator

    本文以機載相控陣雷達視頻信號模擬器的研製為背景，以實現和差通道的目標和雜波模擬為重點，對該系統的雷達時序產生和系統的視頻輸出等問題的設計和實現進行了較深入的研究。
  11. The hardware system is consisted of ccd camera, video capture card, pcl - 731a digital input / output card, signal delay controller, industry computer and outside executing set

    系統硬體部分由ccd彩色攝像頭、圖像採集卡、 pcl - 731a數字量i o卡、信號延時器、工業用計算機和外部執行機構組成。
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