voltage clamping circuit 中文意思是什麼
voltage clamping circuit
解釋
鉗壓電路-
The following is the main works and conclusions of this thesis. the novel upfc needs high power rate because it is generally used in high voltage transmission lines. after studied high - power converters and the literatures of upfc, the main circuit topology of novel upfc base on diode - clamping multilevel inverter is presented and the principle of using novel upfc to eliminate zero sequence and negative sequence currents is analyzed
本文所做的主要工作及得出的主要結論如下：由於upfc一般用於高壓輸電線，其功率等級要求很高，在綜合研究大功率變換器和upfc現有文獻的基礎上，提出了基於二極體箝位多電平變換器的新型upfc的主電路拓撲，分析了用其來濾出高壓輸電線非全相運行時所產生的零序和負序電流的原理。 -
The main ideas of the thesis and the contributions to the resonant dc - link area are also listed in this chapter. a novel control strategy for the two - amplitude actively clamped resonant dc - link is proposed in chapter ii. it neglects the bus short circuit time adjuster and stabilizes the clamping voltage by a pi regulator so that the obtained link frequency is improved and the link losses are greatly reduced
第二章針對雙幅控制技術在單相橋式電壓源逆變器中的應用為範例進行研究，提出了直流母線無短路控制和通過pi調節環穩定箝位電壓的雙幅諧振控制策略，進一步提高了母線振蕩頻率，減少了直流環節損耗。
分享友人