字組分配器 的英文怎麼說

中文拼音 [zìzǔfēnpèiqì]
字組分配器 英文
bdxr. block demultiplexer
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 組 : Ⅰ名詞1 （由不多的人員組成的單位） group 2 （姓氏） a surname Ⅱ動詞（組織） organize; form Ⅲ量詞（...
  • 分 : 分Ⅰ名詞1. （成分） component 2. （職責和權利的限度） what is within one's duty or rights Ⅱ同 「份」Ⅲ動詞[書面語] （料想） judge
  • 配 : Ⅰ動詞1 （兩性結合） join in marriage 2 （使動物交配） mate （animals） 3 （按適當的標準或比例加以...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 配器 : orchestrate; arrange配器法 orchestration; 配器者 orchestrator; orchestrater; instrumentator
  1. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  2. This instrument platform mainly consists of digitizing storage oscilloscope module, signal generator module, usb interface circuit and corresponding software

    該測試平臺主要由下面幾個部分組成： usb介面、數字存儲式示波器模塊、信號源模塊、以及配套軟體等。
  3. It ' s well known that the project documentations " storage and management have an very important effect on the development of all kinds of project, and as the information age is coming, network technology has been applied to this procedure gradually. this article mainly introduces the study and realization of a internet - based project documentation storage and management system which application programming frame is built with delphi6. 0 and sql server2000. based on the tcp / ip protocol, the system try to establish a c / s model with connection - oriented, dependable stream sockets and multithread technology to complete some especial data communications by networks, such as the files of project, directory of user, all self - defined commands or messages and their parameters, and so on

    本文所研究的《基於internet的項目文檔存儲管理系統》通過delphi6 . 0和visualc + + 6 . 0相結合的開發平臺，結合sqlserver2000 ，將client server模式的數據庫技術和windowssocket網路通信技術進行集成，遵循tcp ip協議，同樣採用c s結構運行於internet ，通過服務器將處于各個不同物理位置的客戶機連接起來，形成一個交流平臺；其中，引入了目前國際上流行的先進的安全管理控制方法? ?角色控制理論對用戶進行權限分配，使擁有相應角色的人具有相應權限；然後系統自動根據組織部門或用戶的設立在服務器端生成相應的網路「虛擬文件櫃」 ，使擁有相應權限的人可以對相應文件櫃中的文檔進行整理；再通過多線程技術和windows套接字通信機制在tcp ip協議上實現了單個文件及目錄的傳輸。
  4. Also, this thesis brings forword reasonable testing methords according to the actual project. in this test system we assign the output signals of the power electric chest though a tua ( testing unit allocatee ). the automatic test system is composed by an industrial computer, five pci switch modules, a pci digital multimeter and two load chests

    按照標準分析所得的測試項目和測試方法，本系統通過測試單元適配器（ tua ）對被測系統信號進行調理和分配，由工業計算機、程式控制開關卡、數字多用表卡、負載箱等組成基於pci總線的自動測試系統，對被測電源電子箱進行測試。
  5. This thesis deals with design and application of a multiprocessor made of four dsps in monitoring receiver. the broadband monitoring receiver requires a kind of chip with high performance because of complicated intermediate frequency signal processing. the author selects a kind of digital signal processor called adsp21160. during the process of design, the author uses cpld, fpga and some special cpus to finish signal, processing in the monitoring receiver. cluster multiprocessor based on vxibus made of four adsp21160 is put forward. the task distribution of four dsps is solved too. furthermore, data transition methods between chips at a high speed through link ports and chip extension mode using external port are recommended. the author debugs, emulates the program in one adsp - 21160 ez - kit lite and simulates the multiprocessor program in visualdsp + +

    本文主要探討了監測接收機中多dsp處理模塊的設計與應用，寬帶監測接收機的中頻處理數據量大、實時性高，這樣，對dsp晶元提出了很高的要求，作者通過比較選擇了最適用於監測接收機的數字信號處理器adsp21160 ，並結合使用了cpld 、 fpga以及一些專用的cpu來完成監測接收機中的數據處理。作者提出了由四片adsp21160組成的簇式多dsp處理模塊的結構並配以了vxi總線，論述了簇式結構的特點，解決了多dsp處理模塊中四片adsp21160的任務分配問題。
  6. 1 ) realization of software packet embedded in m - es and md - is respectively to accomplish main function of mdlp, including assignment of tei ( temporary equipment identifier ), establishment of multiple frame operation, framing, flow control and error - free transmission of packets, is detailed. 2 ) a test model is established to evaluate the robustness and stability of mdlp and verify the validity of software packets. 3 ) according to the design of radio modem construction used in m - es, the modules of interface between data terminal equipment and radio modem are achieved to enable transmission of short message and continuous pseudo - random bit stream via rs232 uart

    本文首先概述了蜂窩數字分組數據網的結構和空中協議，詳細分析了移動數據鏈路協議，並在此基礎上，重點敘述了以下方面的工作： 1 ）設計並完成了分別應用於m - es和md - is端無線控制器的兩套程序實現數據鏈路層的主要功能，包括分配臨時設備號、建立鏈路、組幀和面向連接的服務保證分組正確無誤地傳輸，並進行適當的流控； 2 ）建立測試模型測試移動數據鏈路協議的可靠性和穩定性，證明了程序包的效用； 3 ）根據cdpd系統無線數據機的軟硬體總體設計方案，完成了介面模塊，實現了rs232異步串口通信，使用戶可以根據需要發送短消息或連續的偽隨機比特流； 4 ）在tms320c54x的軟體、硬體模擬平臺上，建立了cdpd試驗模型，實現了cdpd系統的mdlp基本功能。
  7. This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process

    本文研究了一種實用的步進電機細分驅動系統，由數字控制模塊、驅動模塊和電源模塊組成，系統以at89c52單片機為核心，通過單片機的i o口、定時器計數器中斷來實現外部事件監控以及控制信號的產生，系統將可編程邏輯器件（ pld ）器件和在系統編程（ isp ）新技術引入到細分驅動環行分配器的設計，通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構，大大簡化了電路，並提高了電路抗干擾能力。使系統實現參數存儲，速度數字控制，數碼顯示，進退刀控制等功能。
  8. ? analysing and researching full - digital dc speed adjustment controller, and expounding the elementary component, elementary working principles, 110 technology and the configutation and tune of main parameters. ? devising the plc control system of container loading bridge, mainly including hardware and software design, and emphatically studying the problem of cargoes ? weight measurement of container loading bridge

    對全數字直流調速器進行了比較深入的分析與研究，並以法國te公司的rtv - 84系列直流驅動器為例，闡述了其基本硬體組成、基本工作原理、 i / o介面技術以及主要參數的配置和調節。
  9. In this solution, the embedded soft cpu ip core is used as the kernel digital module with its periphery controllers based on residual les. in addition, analog channel circuit is added to form an integrated dso system. this dissertation focuses on framework construction, gui design, memory management, message fifo management, other hardware drivers and describes design and implementation of software simulation system written in advanced languages

    在這種方案中，使用了在fpga中嵌入cpu軟核作為控制核心，並用fpga晶元中剩餘的其他可編程邏輯資源構成該嵌入式系統的外圍器件，形成數字示波表的數字核心模塊，並配以模擬通道部分電路，組成了一個完整的數字示波表。
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