幀分解器 的英文怎麼說
中文拼音 [zhèngfēnjiěqì]
幀分解器
英文
fd frame disassembler-
Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。A new bit rate control strategy with both global pre - allocation and local segmentation ( glas ) for low bit rate application is proposed. first, it allots bit date to every frame in advance according to possessive rate of buffer, and then distribute different quantization parameters according conctete detail. by means of this method, buffer is controlled more particularly. and the quality of decoded image is improved, the traditional video image coding method, that is to say, the intraframe coding based on dct and the interframe prediction coding based on motion compensation, is not suitable for low bit rate compression and aside from this, the encoder is too complicated
它首先在總體上根據緩存器的佔有率給每幀預分配比特數，然後再根據具體細節給予不同的量化參數。使緩存器得到了更細致的控制，解碼圖像的質量有所改善。針對傳統的視頻圖像編碼方法，即幀內基於dct的編碼加幀間基於運動補償的預測編碼存在不適于低比特率壓縮，編碼器復雜等不足，討論了基於3 - ddct的xyz視頻圖像壓縮編碼方法，提出了3 - ddct系數的三維「 z 」形掃描方案，大大提高了編碼效率。It eliminates the need for agent blocks to have specific knowledge of ram array behind it. it takes care of protocols and latencies in an effort to simplify memory access by the agent blocks. agent blocks " see " a single linear frame buffer, all paging and bank swapping is handled by the and is transparent to the agent blocks
在嵌入式系統晶元中高速存儲器介面控制電路是系統必不可少的重要組成部分，由於有了存儲器介面的存在，使得系統內部客戶模塊不必專門了解存儲器本身的復雜特性，而只需關心傳輸協議和一些定義的遲滯參數，在客戶看來存儲器僅僅是一個線性的幀緩沖器，所有的換頁、區段切換都交由介面電路來處理，從而大大簡化了客戶對存儲器操作的復雜度。The goal of this thesis is to accomplish base - band channel coding / decoding, fh framing / de - framing and fh synchronization, and also to control the modulator and demodulator in the prototype system. all these functions are implemented with a tms320vc5409 dsp
作為項目的一個重要組成部分，本文採用dsptms320vc5409實現了基帶處理部分的通道編解碼、跳頻意義的組拆幀和跳頻同步、並對調制解調晶元讀寫寄存器進行了配置。The mpls technology was raised just in order to make the most of the switching technology in the core of the network and the ip routing technology on the edge of the network. before presenting the solution of the mpls, there are many integration model, the basic method adopted by them were all carry the control information from the ip router, and combine it with the transmition capability and the label switching of the atm switching machine, accordingly constructing a high speed and economic multi layer switching router. but, all these solutions can not communicate and just suit for adapting the atm as the second layer transmiting link, can n ' t work on other interface ( fr, ppp, and ethernet ), this is obviously conflict with the developing way of the based on packet of the internet
多協議標簽交換（ mpls ）技術就是為了綜合利用網路核心的交換技術和網路邊緣的ip路由技術各自的優點而產生的。在mpls技術方案提出之前已有的各種集成模型解決方案所採取的基本方法都是從ip路由器獲取控制信息，將其與atm交換機的轉發性能和標簽交換方式相結合，從而構建成一個高速而經濟的多層交換路由器。但是，各種方案彼此不能互通，而且僅適用於以atm作為第2層的傳輸鏈路，不能工作在其他多種媒體（如幀中繼、點對點協議、以太網）中，這與internet基於分組的發展方向相矛盾。Signal forming and different demodulation of gmsk baseband signal are mainly discussed in the dissertation. gauss filter, phase integral, sin table, matched filter, calculate angle, bit - synchronization 、 output filter 、 a / d 、 d / a and etc of gmsk baseband signal are carefully studied through software emulation in systemview environment. the modulation and demodulation of gmsk baseband signal are carried out by the way of using tms320vc549 of ti to integrate software and hardware
本文重點討論了gmsk基帶信號的形成以及gmsk基帶信號的差分解調，系統在systemview的環境下進行了軟體模擬，通過對系統的模擬工作，仔細的研究了gmsk基帶信號的高斯預濾波器、相位積分、 sin查表、匹配濾波器、相角計算、位同步、幀同步、輸出濾波、 a / d和d / a等。Mpeg - 4 can only adopt software compress / decompress when used in nles. when frame accuracy editing begins, the file ' s random seeking will be delayed. this article analyses why this happens, peculiar filter reulation based on directshow / des platform, which supplied by microsoft corpation, and highly efficient compressing are the main reasons
本文分析其產生的原因在於windows操作系統提供的directshow des開發平臺所特有的過濾器機制以及mpeg - 4壓縮數據碼流是基於i 、 b 、 p幀，其高效的壓縮演算法決定了解碼的復雜度等多方面。分享友人