幀同時制 的英文怎麼說

中文拼音 [zhèngtóngshízhì]
幀同時制 英文
frame simultaneous system
  • 幀 : 量詞（幅, 用於字畫）
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 制 : Ⅰ動詞1 （製造） make; manufacture 2 （擬訂; 規定） draw up; establish 3 （用強力約束; 限定; 管束...
  1. Later the couple nodes can implement the control frame transmission or data transmission. this kind of data transmission protocol based on slot precontract basically fulfills the networking and data transmission function

    同步呼叫協議主要用於完成點到點鏈路建立和業務通道的協商任務，協商完畢即可在後續的時間內在業務通道上完成控制幀或數據幀的傳輸。
  2. It is composed of three mian protocols : call synchronization protocol, control frame transmission protocol based on arq mechanism and data transmisstion protocol based on slot precontract mechanism. one scan channel table is shared in the hfmanet. the nodes in the same dwell group work in the same scan channel, and the nodes in the different dwell group work in the different scan channel

    該協議的網路拓撲結構採用分散式分群結構，協議不同於傳統的短波點到點及需要中心節點轉發的組網方式，而是初步實現了短波電臺之間多跳組網功能，其協議內容主要包括同步呼叫協議、基於arq的控制幀傳輸協議和基於虛電路及時隙預約方式的數據幀傳輸協議。
  3. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  4. Based on the dsp development board, the author finishes the hardware debug about the multi - channel buffered serial port ( mcbsp ) receiving the output signal from the gps if collector and resolves the software program of the receiving buffer of the multi - channel synchronous serial data, data integration, udp datagram encapsulation and network interface driver, etc. the real - time udp datagram receiving, data frame de - encapsulation and high speed data memory are implemented, and a friend application interface with windows message is developed on the pc

    基於dsp開發板，作者完成了dsp的多通道緩沖串口（ mcbsp ）接收gps中頻接收機輸出信號的硬體調試，並解決了多通道同步串口數據的接收緩沖、數據合併、 udp數據報裝幀及網路介面驅動等軟體編程。在pc端，通過mfc的網路應用開發類casyncsocket實現udp報的實時接收、數據解幀譯碼、高速存貯，利用windows消息機制開發了應用程序友好界面。
  5. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  6. One of the characteristics of gprs service different from real - time voice service is that it requires very low erroneous frame rate. the accuracy of packet data can be guaranteed through the mechanism of retransmission, which, however, leads to longer transmission delay and low payload in spite of busy channels

    Gprs業務不同於實時語音的一個特點是它要求有很低的誤幀率，這可以通過重傳機制保證分組數據的正確，但重傳將使傳輸時延大、通道盡管很忙但有效的負荷卻低。
  7. 2. 768 * 576 pixels and 24 bit real time dynamic and static pictures can be captured by a special medical video card. the number and quality of the pictures captured can be controlled by the frame frequency, size of the documents enacted. owing to the image real time compress technology, real time record can be long time, documents transcribed can be re - screened randomly, operation database can be created automatically, normative operation reports can be printed freely

    2 、通過一塊專有的圖像採集卡可以捕獲768 * 576象素解析度的真彩實時動態和靜態圖像;可通過設定捕捉頻率、幀數、文件大小來控制所捕獲圖像的數量和質量;由於採用運動圖像實時壓縮技術，可以長時間實時錄像，同時能任意回放錄制的文件;自動生成手術數據庫，能隨意列印規范的手術報告單。
  8. Moreover, video control program to implement internal function of fpga is designed including video capture time sequence control, ping - pang frame buffer read and write time sequence control and lcd display time sequence control, and program ' s simulation and analysis is also provided. at last, this paper presents a portable iv ' s video processing system, and proposes three buffer strategy to control capture buffer. and a moving object detection algorithm of combing an adaptive background subtraction technique with a three - frame differencing is adopted

    設計了基於fpga系統結構的車載視頻顯示電路板；利用單片機io口模擬i2c時序，實現了視頻解碼晶元控制；利用fpga實現視頻控制，研究了採集通道時序控制、雙幀存ram讀寫時序控制及lcd顯示時序控制的方法，並進行了軟體模擬和分析；設計了車載視頻檢測系統方案，給出了管理採集緩沖區的三幀緩沖策略，採用綜合三幀差分和自適應背景相減的演算法實現運動檢測，連通體檢測去除虛目標，模擬實驗證明其有效性，同時分析了該演算法在dsp視頻檢測系統中的簡單實現方法。
  9. At the base of earnestly analysis to the ov7620 working sequence, using its frame synchronization, field synchronization and the pixel - clock signal, completed gathering of the active power meter reading image which is reduced resolutions at the control of mcu

    在仔細分析ov7620工作時序的基礎上，利用其幀同步、場同步和像素時鐘信號，在單片機的控制下完成了對電度表讀數圖像的降低解析度採集。
  10. Furthermore, this paper exploringly studies an 802. 1 la high - speed wlan with the 54mbps data rate, and presents a sort of time synchronization and frequency offset estimation method based on the frequency domain auto - correlation of the unique preamble training sequence of 802. 11 plcp frame ; the method have the high time precision, the wide frequency estimat ion range and short convergence process ; and moreover, it can applied to other frame communication system

    另外本文還對最高傳輸速率為54mbps的802 . 11a高速無線局域網系統進行了探索性研究，討論了ofdm調制技術在無線局域網中的應用；結合802 . 11a物理層數據幀結構特點，提出了一種基於前導訓練符號序列的頻域自相關時間和頻率同步方法，此方法具有定時精度高、頻偏估計范圍寬和同步建立迅速等特點，也適合於其它幀通信應用場合。
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