幀號 的英文怎麼說

中文拼音 [zhèngháo]
幀號 英文
frame number
  • 幀 : 量詞（幅, 用於字畫）
  • 號 : 號Ⅰ名1 （名稱） name 2 （別號; 字） assumed name; alternative name3 （商店） business house 4 （...
  1. Each time slot of the uplink frame contains a byte overhead, whose guard time is used to keep slight phase shifts from impairing the signal. the prepositive bit pattern is used for synchronization capture

    在上行幀的每個時隙里有位元組開銷，其防衛時間用於防止微小的相位漂移損害信號，前置比特圖案則用於同步獲取。
  2. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  3. After about two years " insisting and hard working, this goal set at the beginning has become true. the developed c54x general assembly program for g. 729 speech signal compressing algorithm has passed the tracking with more than 3, 000 unitary standard measuring vectors. g. 729 speech signal compressing compiler using c54x general assembly program has been accomplished real - timely, and undistorted rebuilt speech signals have been obtained

    因此本課題選用c54x的通用匯編語言編程實現g . 729語音壓縮編碼演算法，調試並通過了統一標準測試矢量三千多幀，最終在5402開發實驗板上實時實現了g . 729語音壓縮編碼器，獲得未失真的重建語音信號。
  4. Each virtual - loop ' s output signals mainly derive from the pixel difference between consecutive image frames within the virtual - loop area. when the result of consecutive frame difference is smaller than the threshold, current frame subtracts the background to produce the virtual - loop ' s signals

    各個虛擬線圈的輸出信號主要來源於幀間差分，當幀間差分的結果小於判斷閾值時，系統會自動調用減背景圖像處理方法來產生虛擬線圈信號。
  5. Based on the dsp development board, the author finishes the hardware debug about the multi - channel buffered serial port ( mcbsp ) receiving the output signal from the gps if collector and resolves the software program of the receiving buffer of the multi - channel synchronous serial data, data integration, udp datagram encapsulation and network interface driver, etc. the real - time udp datagram receiving, data frame de - encapsulation and high speed data memory are implemented, and a friend application interface with windows message is developed on the pc

    基於dsp開發板，作者完成了dsp的多通道緩沖串口（ mcbsp ）接收gps中頻接收機輸出信號的硬體調試，並解決了多通道同步串口數據的接收緩沖、數據合併、 udp數據報裝幀及網路介面驅動等軟體編程。在pc端，通過mfc的網路應用開發類casyncsocket實現udp報的實時接收、數據解幀譯碼、高速存貯，利用windows消息機制開發了應用程序友好界面。
  6. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  7. Audio, video and audiovisual systems - interconnections and matching values - specification for interface for the interconnection of eng cameras and portable vtrs using non - composite signals, for 625 line 50 field systems

    音頻視頻和視聽系統.互連和匹配值.第3部分:使用625行， 50幀無混合信號便攜式vtrs和eng攝像機互連介面規范
  8. At the receiving end, a inverse process is performed. the system receives low rate data and the fpga reorganizes a frame of data which is decoded by the compression chip every 20 ms. the obtained pcm signal is performed d / a to restore the analog speech signal

    在收端進行相反的過程，接收低碼率數據，並由fpga重新組幀，送至主晶元解碼得到pcm信號，再作d / a變換，恢復出模擬語音，系統是全雙工的。
  9. The sensor operation speed can be 64ms / frame ~ 2ms / frame. in the research of photoelectric cell, device physics structure of pixels have been optimized. deep junction depth photodiodes, such as p + / n - well / p - sub structure, have been used and the photo - response of the sensor has been greatly enhanced

    復位信號為sv時的單幀感光動態范圍為60db ，採用改變復位信號頻率的二次掃描方式可將傳感器的總的感光動態范圍擴大到84db ，可對0石10 ， 000lx光照強度的信號進行傳感。
  10. And the solutions of the three problems above are discussed : the solution to the simulcast interfering which is caused by the simulcast delay spread ( sds ) and the zero - beating is given in chapter four. based on the well understanding of the principle of ms - i / h / 0 in ipnp, the examples are given in chapter five on how to solve the problem of communication interruption between paging zones. through the analyse of signal switching between chengdu and deyang, the synchronization error between flex frames, and the bug in the multi - frequency roaming principle are pointed out

    通過以上分析，文章探討了對上述三個問題的解決： ?對同播干擾問題，分別分析了時延差和零拍頻所造成同播干擾的客觀存在，探討了系統設計和網路優化的基本方法； ?對ipnp聯網障礙，提出了在掌握ipnp對各pncc作為輸入局歸屬局?輸出局（ ms ? i h o ）的靈活定義、以及相關參數配置原理的基礎上，分析聯網障礙的思路； ?對信號切換障礙，以成都和德陽兩地的局部廣域覆蓋為例，分析了flex幀失步和flex多頻漫遊原理設計缺陷的客觀存在，並探討了相關的解決方法和建議。
  11. The principles of laser technology, photo - electronic transformation technology and photo - electronic signal gathering technology were discussed in this paper, a new imaging laser threat warning device used in antagonizing laser - guiding weapon was designed and its main parts and circuit were described in detail

    本文闡述了激光技術、光電轉化技術以及光電信號採集技術的基本原理。根據來自激光制導武器的威脅，採用較為先進的光敏電荷耦合器件（ ccd ）和廣角遠心魚眼型透鏡的探測技術，以及幀存儲和幀減法技術。
  12. For example, carrier frequency offsets, which are caused by the inherent instabilities of the transmitter and receiver carrier frequency oscillators, can lead to severe system degradation due to inter - carrier interference ( ici ). symbol timing synchronization must also be achieved in order to avoid inter - symbol interference ( isi )

    其載波頻率誤差會引入子通道之間的干擾（ ici ） ，而幀同步的誤差會引入符號間干擾（ isi ） ，同時還會對通道估計帶來嚴重的影響。
  13. The system is consist of the main data processing board which is based onthe fpga device and fast ethernet phyceiver rtl8201l and a - law pcm data encoder and decorder chip msm7702 - 3, and the dial - up and display board which is based on mcu. the main board would carry out the core task of data processing, such as voice data packing and unpacking, the ethernet frame processing, protocol processing, call processing, etc. the dial - up and display board would carry out the task of display the ip address which is input by consumer and status of network during talk period from the main board, and so on. in the paper the system of lan ip telephone and the tcp / ip protocol is introduced firstly, then the fpga device is stated. after that the fpga - based hardware scheme is introduced in detail in chapter four

    系統以altera公司的acex1k系列的fpga和快速以太網控制器rtl8201l和語音編解碼晶元msm7702 - 3為核心構建了數據處理主板和以單片機為控制器的撥號顯示子板組成。數據處理主板的核心任務，包括語音數據處理、以太網幀處理、協議處理、呼叫處理等。撥號顯示子板則完成通話前的顯示用戶所撥過的ip地址，通話期間網路狀態的顯示等等。
  14. We select fpga of type xc3s200 as hardware to design the coder and display the hardware resources inside, moreover study the method and steps of designing dsp, based on fpga, by using system generator, finally, it emphasizes the design process of multi - band excitation vocoder. we can work out the module of high pass filter and the module of low pass filter, module of divide frame, module of keynote rough estimate, module of keynote fine estimate, module of band - separated v / u judgment / verdict and module of band - separated amplitude estimate, by using simulink, ise and system generator

    本文選用型號為xc3s200的fpga作為設計編碼器的核心硬體，介紹了其內部所含的硬體資源，並研究了利用systemgenerator基於fpga設計dsp的方法和步驟，最後，本文把重點放在多帶激勵語音編碼器的設計上，利用simulink ， ise和systemgenerator分別設計其中的高通低通濾波器模塊、分幀疊加模塊、基音粗估模塊、基音精細估計模塊、分帶v / u判決模塊、分帶幅度估計模塊。
  15. Carry on emulation to melp standard, realize that the compression of the pronunciation file is solved and pressed. first this thesis sample to wav file, carry on the speech to analyze and draws with the parameter to the speech data of every frame. these parameter include pitch, bpvc, jitter, lpc, etc. then, these parameters will be quantized by msvq technology

    該系統首先對語音信號進行采樣；按幀對語音數據進行語音分析和參數提取，提取的參數包括基音周期（ pitch ） 、多帶清濁音判別、非周期抖動標志、線性預測參數（ lpc ）等語音生成模型參數；接著對這些參數進行了量化，量化採用了多級矢量量化技術；最後在解碼端對各個量化參數進行解碼，利用這些參數結合語音合成模型重構語音。
  16. In addition to physical dial - up, frame relay, isdn, or x. 25 connections, the connection can be in the form of a direct connection to the corporate network or a point - to - point, branch office vpn connection through the internet

    除了物理撥號、幀中繼、 isdn或x . 25連接之外，還有直接連接到企業網、點對點連接或通過internet連接分支機構的vpn等連接形式。
  17. This painting involves fetching data from the frame buffer and converting that digital pixel data into a stream of analog signals that the monitor can understand

    這個過程包括從幀緩沖中取數據然後將數據沖數字信號轉換成模擬信號，傳送給顯示器。
  18. A method for dealing with pipelining errors in which the receiver simply discards all subsequent frames, sending no acknowledgments

    處理管線傳輸錯誤的一種方法，在這種方法中，接收方發現錯誤后簡單地廢棄后續幀，不發送確認信號。
  19. Rolls the debugger back to a specified frame number

    將調試器回滾到指定的幀號碼。
  20. If the debugger encounters an exception, use this command to roll the debugger back to the specified frame number

    如果調試器遇到異常，使用此命令可以將調試器回滾到指定的幀號碼。可以使用
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