控制存儲器 的英文怎麼說

中文拼音 [kòngzhìcúnchǔqì]
控制存儲器 英文
control memory
  • 控 : 動詞1 （告發;控告） accuse; charge 2 （控制） control; dominate 3 （使容器口兒朝下 讓裏面的液體慢...
  • 制 : Ⅰ動詞1 （製造） make; manufacture 2 （擬訂; 規定） draw up; establish 3 （用強力約束; 限定; 管束...
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 儲 : Ⅰ動詞（儲藏; 存放） store up; save; keep [have] in reserve Ⅱ名詞1. （繼承人） heir 2. （姓氏） a surname
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 控制 : control; dominate; regulate; govern; manage; check; cybernate; manipulate; encraty; rule; rein; c...
  • 存儲 : [計算機] memorizing; storage; memory; store
  1. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  2. According to this idea, this paper first introduces the basic technology to design the instrument. it includes the theory of the laser, measures to survey distance with laser, the theory of the step - motor, subsection technology of the step - motor, the working theory of the single - chip, expansion of the single - chip orderly. the following are the design of the control system of the planimeter according to the principle of the context. it consists of two parts

    最後根據前文介紹的知識先對單片機控制系統進行了硬體電路框圖設計，依據夠用原則對元器件、設備的選擇進行計算、說明、選定，使系統成為擁有完整的包括a d採集、數據存儲器、 8155擴展的鍵盤顯示、 p1口及8155的pa口輸出控制的單片機硬體控制系統電路。
  3. Applying two perpendicular polarized light states and a no - light state to express information, this new theoretical system covers : a ) whole architecture constructed from light processing, light transmission, electric control and photoelectric input and output ; b ) various computing units mainly consist of liquid crystal element and polarimeter ; c ) light bus mainly consists of interlinkage optic valves ; d ) ternary memory formed from semiconductor memory ; e ) register formed from optic fiber ring ; and i ) huge - numeral management based on the new concept of calculating path and calculating channel

    這個理論包括：光處理、光傳送、電控制、綜合輸入輸出的總體結構；以液晶元件和偏振器為主的各類運算器結構；以互連光閥為主的光空間總線；以半導體存儲器為主的三值數據存儲器結構；以光纖環為主的寄存器結構；以算位、算道新概念為基礎的巨位數管理方案等。
  4. The chip simulation network laboratory system this paper disguessed is a distribute network simulation system based on lan. the system ' s architecture is a c / s of three lays. the front platform are the chip simulation network system application program terminer ; the middle lay is a dcom server, it ' s duty is to deal with the communication and data transmission between the terminer and then database server, and to execute the logical operation. the application program just connect with the middle lay and get data from it, the connection and operation with database server will be managed by the dcom server. the duty of database server is to access and backup the final data

    具體是由位於網路各個終端的晶元模擬網路實驗系統應用程序為前臺；中間層為dcom應用程序服務器，負責處理前臺應用程序與后臺數據庫的通信和數據傳輸，並執行業務邏輯，前臺應用程序只需要與應用程序服務器建立連接，在中間層操作數據即可，與后臺數據庫的連接和操作由應用程序服務器來統一管理操作。后臺數據庫只負責數據的存取操作。本論文實施的晶元模擬網路實驗系統模擬了主要的邏輯電路器件， 8088cpu ，存儲器，寄存器，數據總線，地址總線和控制總線，及其它相關晶元。
  5. Adopting the method of top - down, the virtual memory is divided into memory mange related unit ( segment unit and page unit ) and protection mode related unit ( protection test unit, debug test unit and exception detect unit ). data buses and control bused are designed separately for all of the units. vhdl codes are written and simulated

    Amex86的虛擬存儲器採用自頂向下的設計方法，把虛擬存儲器劃分為地址管理相關單元（又包括分段單元和分頁單元） 、保護模式相關單元（又包括保護測試單元、調試異常單元利異常檢測單元等） ，分別確立其數據通路和控制通路，完成了vhdl的編碼和模擬工作，通過測試程序模擬驗證了其功能的正確性並測定了基本性能。
  6. As an experiment of basic course in electronic technology, the project is based on domination principle of digital music player and integrates with the elementary application of multiplexer, flip - flop, counter and rom, which enables students to comprehend these knowledge fully along with acquaintance of technical application and promotes systematic understanding of basic notions, course content and advances the transformation from knowledge to ability

    作為數字電子技術基礎課程的實驗內容，該方案設計以數字音樂播放的控制原理為切入點，結合了數據選擇器、觸發器、計數器和只讀存儲器的基本應用，使學生在充分理解這些知識點的同時了解一些工程應用背景，以形成對課程內容、基礎概念的系統認識，促進知識向能力的轉化。
  7. It introduces the architecture of the switch, hol, delay control, vlan and spanning - tree algorithm, and crossbar backplane and store - and - forward technology

    介紹了線頭阻塞、時延控制、虛擬局域網和生成樹演算法等概念以及交換機的交換矩陣和共享存儲器等關鍵技術。
  8. A circuit that pulls information from the control store memory based upon external events or conditions

    依據外部事件或條件將信息從控制存儲器中取出的一種線路。
  9. A fully processed unit of operational data which is ready to be transmitted to a remote unit ; when loaded into control storage in the remote unit, the image determines the operations of the unit

    一種可完整處理的運行數據單位，已完全就緒可以傳送給某一遠程設備；當裝入遠程設備的控制存儲器時，該映象就決定了該設備的運行情況。
  10. The high - speed data buffer is designed by adopting cpld and general high - speed static memory. 5

    採用cpld控制邏輯外加通用靜態高速存儲器來實現採集后數據的高速緩存。
  11. In a3791 controller, a portion of a3790 program or of data stored in one sector of disk storage

    在3791控制器中，磁盤存儲器的一個扇區內存儲的一部分3790程序或數據。
  12. In dpcx, the automatic transfer of storage blocks between the associative storage pool in processor storage and the virtual storage paging area in disk storage, and the reading of program blocks from disk or processor storage into the program area of a symbolic machine

    在分散式處理控制執行程序（ dpcx ）中，存儲塊在處理機存儲器中相關存儲池與磁盤存儲器中虛擬分頁存儲區之間的自動傳送，並從磁盤或處理機存儲器讀入程序塊到一個符號機的程序區中。
  13. Along with the many canned cycle options, cnc builders introduced displays for visual editing of part programs in memory

    由於擁有眾多封閉循環選擇，數字計算機控制系統營造商在部分程序存儲器中引入視覺編輯顯示。
  14. Computer hardware because progressively less expensive and more reliable and nc control builders introduced for the first time read only memory ( rom ) technology

    由於計算機硬體的日益成熟並大量低成本的被生產出來，數字計算機控制營造商們開始第一次引入只讀存儲器技術。
  15. The part of execution in which an operand or instruction is read from main stora ge and written into a control unit or arithmetic unit register

    執行過程中的一個階段所需的時間，在此期間，計算機從主存儲器中取出指令或操作數，並將其存入控制器或運算器的寄存器中。
  16. It eliminates the need for agent blocks to have specific knowledge of ram array behind it. it takes care of protocols and latencies in an effort to simplify memory access by the agent blocks. agent blocks " see " a single linear frame buffer, all paging and bank swapping is handled by the and is transparent to the agent blocks

    在嵌入式系統晶元中高速存儲器介面控制電路是系統必不可少的重要組成部分，由於有了存儲器介面的存在，使得系統內部客戶模塊不必專門了解存儲器本身的復雜特性，而只需關心傳輸協議和一些定義的遲滯參數，在客戶看來存儲器僅僅是一個線性的幀緩沖器，所有的換頁、區段切換都交由介面電路來處理，從而大大簡化了客戶對存儲器操作的復雜度。
  17. Control code storage

    控制電碼存儲器
  18. Based on the demonstration in the project target and the technologic support, the hilss is completely constructed, which is a tightly coupled multi - processor system composed of a standard personal computer, a high - performance single chip microprocessor system and a fast - running floating point dsp system. the debugging of the outside ecu will become easier by the friendly graphical user interface, and the high - speed signal transfer through all the parts. besides, the hilss can be expanded conveniently for its modular components

    在這一系統中， pc上位機、單片機和dsp系統通過共享存儲器構成了一個緊密耦合的多處理器平臺，友好的圖形化用戶界面、高速的信息採集和控制響應、模塊化的系統功能構成為外部電控系統的調試創造了良好的開發環境，同時也為系統今後進一步的擴展奠定了扎實便利的基礎。
  19. As the requirements of its function, a bus control interface board has already been designed. also the paper have provided the scenarios demonstration for the bus control interface board ( bcib ), the design for the protocol of communication, the hardware for bcib, the software for bcib, and the software for the processor ' s communication. while the analysis for the capability of real - time and the calibration and test for subsystem have been also finished. during the design, the system advanced ability, reliability, resources availability and the cost - efficency ratio are considered. the issus such as system integrated control, mutual exclusion of the shared storages, generation of handshaking signal and system self - test were resolved

    本論文主要對航空自衛系統的綜合化方式進行了深入研究，並按其功能等方面要求，對航空自衛系統綜合化總線通信模塊進行了設計，主要完成了總線通信模塊方案論證、通訊協議設計、總線通信模塊硬體設計、總線通信模塊（ bcib ）軟體設計、處理機通信軟體設計、實時性分析、系統調試、試驗等項工作，在設計過程中，綜合考慮了系統先進性、資源利用率、費效比及可靠性等因素；重點解決了系統綜合控制方式、共享存儲器互斥、握手信號產生及系統自檢測等問題。
  20. The floating - point a / d conversion scheme was employed to increase the system ' s dynamic range. complex programmable logic device ( cpld ) was also used to perform the system ' s function such as data sampling trigger control and data storage control, etc. aduc812, a new type of microprocessor with full a / d converter, was utilized to fulfill the a / d conversion

    在數據採集電路設計中，採用了浮點放大技術來提高系統的動態范圍；通過引入可編程邏輯器件來實現觸發控制、存儲控制；采樣過程中應用了時序重疊技術，從而實現了數據採集系統的流水線作業方式。
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