數字程序器 的英文怎麼說

中文拼音 [shǔzìchéngxùqì]
數字程序器 英文
digital programmer
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 程 : 名詞1 （規章; 法式） rule; regulation 2 （進度; 程序） order; procedure 3 （路途; 一段路） journe...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 數字 : 1. （表示數目的文字; 表示數目的符號） figure; digit; numeral; character; numeric character 2. （數量） quantity; amount
  • 程序 : 1 （進行次序） order; procedure; course; sequence; schedule; ground rule; routing process 2 [自動...
  1. Microcircuits. digital microcircuits. fusible link prom memories

    微電路.數字微電路.可熔鏈路程序存儲器
  2. The principle of the hardware and software has been introd uced, with the circu it d i agram, the flow chart an d list of the program

    介紹本次課題所用的196單片機的原理，設計出數字勵磁調節器的電路，分析裝置的硬體電路工作原理，給出詳細的硬體原理圖，設計運行程序流程圖。
  3. A digital automatic ultrasonic inspection system designation is introduced. this system was developed with pc computer and embedded dsp, combining computer software and hardware, ultrasonic nondestructive testing, digital signal processing, embedded rtos and visual instruments technology. it meet the requirements of automatic inspection such as high repetitively frequency and real time alertation

    該方案以pc機和dsp系統為核心構成主從機系統框架，以基於虛擬儀器思想的pc機應用程序和基於dsp的嵌入式實時操作系統構成雙重軟體結構，把傳統的超聲波無損檢測技術和先進的虛擬儀器技術、數字信號處理技術、嵌入式實時操作系統、計算機介面通信技術相結合，從而滿足了自動化探傷中1k / s的重復頻率和實時報警的要求。
  4. This add - in program makes it easy and fast to get pictures from your hard disk drive, scanner, or digital camera into a microsoft powerpoint presentation

    使用本加載項程序，可以方便快捷地將硬盤驅動器掃描儀或數字相機中的圖片添加到microsoft powerpoint演示文稿中。
  5. Download the photo album add - in program for powerpoint 2000. this feature makes it easy and fast to get pictures from your hard disk drive, scanner, or digital camera into a presentation

    使用本加載項程序，可以方便、快捷地將硬盤驅動器、掃描儀或數字相機中的圖片添加到microsoft powerpoint演示文稿中。
  6. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  7. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中，採用高速的dsp處理器，實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法，實現了大電流信號的驅動輸出;採用485總線技術，組建了裝置主機與多探測器之間的主從式通訊網路，實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路，採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術，實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元，設計了人機信息交互的介面;採用了模塊化的軟體設計方法，開發了裝置主機及探測器的軟體程序。
  8. The risc mcu core is based on harvard architecture with 14 - bit instruction length and 8 - bit data length and two - level instruction pipeline the performance of the risc mcu has been improved by replacing micro - program with direct logic block

    設計的riscmcu採用14位字長指令總線和8位字長數據總線分離的harvard結構和二級指令流水設計，並使用硬布線邏輯代替微程序控制，加快了微控制器的速度，提高了指令執行效率。
  9. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。
  10. Ibm worked with charles schwab to break down the application - which encompasses complex analytical and numerical operations - into pieces that could be distributed to multiple processors and then recombined, following the resource - intensive analysis process

    Ibm與charles schwab共同將應用程序該程序擁有復雜的分析和數字操作分解成可分佈到多處理器上的小部分，然後按照資源密集型的分析流程進行重組。
  11. The class provides the knowledge for internalising and externalising an application model ' s data. it enables word processor documents to be embedded within rich text objects

    這個類提供對于內嵌並擴展一個應用程序模塊數據的知識。字處理器文本能夠嵌入在富文本對象中。
  12. The java secure socket extension jsse enables secure internet communications with ssl tls. it provides an application framework - a java version of the ssl and tls protocols - complete with the full range of functionality including data encryption, server authentication, message integrity, and more

    Java安全套接字擴展（ jsse ）利用ssl / tls可以進行安全的internet通信，它提供了一個具有完整功能的應用程序框架一個java版本的ssl和tls協議，這些功能包括數據加密、服務器認證、消息完整性，等等。
  13. Complex programmable logic device ( cpld ), usually used to develop asic, is widely used in digital system to accomplish complex combinational and sequential logic

    復雜的可編程邏輯器件（ cpld ）廣泛地用於數字系統中，常用作設計自己的專用集成電路，可實現復雜的組合邏輯和時序邏輯。
  14. Although the robot has powerful functions, it is limited to use widely due to specific program, running cost and investment cost etc. aiming at improving the welding efficiency and quality and extending the application fields, in this thesis the images of welding path were obtained by non - contact ccd digital imaging technique and were recognized

    雖然焊接機器人功能較強，但由於專用程序、運行成本、投資成本等因素限制了機器人的大量應用。本課題為提高數控氬弧焊機的焊接效率和焊接質量，擴大焊接范圍，採用非接觸式的ccd數字成像技術，獲取焊接軌跡圖像，並對其進行識別。
  15. This paper presents a method of realization of numeric transducer using tms320c542 dsp. the program of numeric down - transducer and multi - rate sampling is given

    摘要在tms320c542數字信號處理器上，用查表方法實現了dsp數字變頻器，並給出相關的數字下變頻和多抽樣率信號處理程序。
  16. Aiming at realizing an all - digital programmable qpsk modulator with data rates covering 2k ~ 2. 048mbps, this thesis puts research on modulator architecture, base - band signal shaping, programmable interpolation algorithm, and digital signal processing algorithms with fpga. we have completed the program design and the timing simulation, the pcb board has been fabricated. the similation result is given to verify the design

    本文以實現2k ~ 2 . 048mbps傳輸速率的變碼速率全數字qpsk調制器為目標，對全數字調制器結構、基帶成形濾波、高倍可變內插以及基於fpga的信號處理演算法等問題進行了研究，編寫了調制模塊的vhdl程序，完成了軟體環境下的驗證調試，並設計實現了板級調試系統。
  17. The paper also introduces the method of subroutine programming to lab view with dynamic link library ( dll ) supporting its significant property. by extending digital filter subroutines, it supplies a gap to lab view

    為彌補labview里數字濾波器子程序欠缺之不足，本文研究了labview和visualc + +環境下應用動態鏈接庫dll技術對數字濾波器進行開發的方法。
  18. What we have adopted in this system are the digital tuner dtq - 1a of philip tda10046, and the fpga of acex series produced by altera corporation, and the idt7206 fifo produced by idt corporation. the staff of the project also completed the communication - controlling program and wince drivers for this card, along with the application program dedicated for the system. the system can carry out the following tasks : receiving, demodulation, decoding, and playing back of the terrestrial - broadcasting data

    接收板採用基於philip公司的tda10046的dtq - 1a數字調諧器、 altera公司的acex系列ep1k30qc208以及idt公司的idt7206的先進先出存儲器（ fifo ） ，輔以自己編寫的通信控製程序，以及基於wince驅動程序開發和上層應用程序開發，實現了數字地面電視廣播的接收、解調、解碼、及播放等一系列功能。
  19. This paper achieves expected digital filters program through algorithms descriptions, analyzing and realization, simulation, comparing on error and speed. this paper achieves expected digital interpolations program through algorithms descriptions, analyzing and realization, simulation, comparing on error and speed

    本文應用matlab信號處理工具箱，通過對數字濾波器演算法的描述、演算法分析、實驗模擬、誤差比較，及性能比較，最終獲得滿足要求的數字濾波程序，並編譯成c + +源代碼文件配合主程序調用，完成了系統聯調。
  20. Hardware interface and theory of digital controller and velocity output are emphasized in hardware design section ; pwm wave producing module closely related chip structure is emphasized in software design section

    硬體設計部分重點介紹了數字控制器和速度輸出環節的硬體介面和工作原理；軟體設計部分重點介紹了與晶元硬體結構緊密聯系的pwm波形產生程序模塊。
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