數字轉鎖 的英文怎麼說

中文拼音 [shǔzhuǎnsuǒ]
數字轉鎖 英文
trick lock
  • : 數副詞(屢次) frequently; repeatedly
  • : Ⅰ名詞1 (文字) character; word 2 (字音) pronunciation 3 (字體) form of a written or printed ...
  • : 轉構詞成分。
  • : Ⅰ名詞1 (安在開合處使人不能隨便打開的器具) lock 2 (姓氏) a surname Ⅱ動詞1 (上鎖) lock up 2 ...
  • 數字 : 1. (表示數目的文字; 表示數目的符號) figure; digit; numeral; character; numeric character 2. (數量) quantity; amount
  1. Monitor apparatus can measure valid value of three phase voltage and current, power factor, three phase disequilibrium, instant flecker of short time and harmonic without twenty, degree and harmonic distortion total. the paper are laid on the following. ( 1 ) master plan and function of circuit, ( 2 ) hardware design including circuit and principle of a / d conversion, phase lock, liquid crystal display and keystroke and so on, ( 3 ) design of system software including digital filtering, fft, a / d conversion and monitor interface of pc, ( 4 ) system test

    監測儀能夠完成包括三相電壓、三相電流的有效值、功率因、三相不平衡、電壓短期閃變、以及20次內的諧波、諧波相位、諧波失真總量等的測量。論文重點介紹了以下幾部分: ( 1 )電路的總體設計和功能; ( 2 )硬體設計,包括a d換、相環、液晶顯示和按鍵輸入等原理和電路。 ( 3 )系統軟體設計,包括a d換、 fft 、濾波等程序的原理和演算法以及上位機監控界面的設計; ( 4 )系統測試。
  2. Finally, the principle of phase - locked - loop for speed control is discussed. the control methods of torque and magnetic levitation force are studied experimentally on a prototype bearingless motor. based on the analysis of shortcomings of the analog control system, a digital control system is proposed

    分析了採用相環對電機速進行閉環控制的原理;設計了磁懸浮力的模擬控制器並對磁懸浮血泵電機進行了實驗研究;針對模擬控制系統存在的缺點,本文設計了一種控制系統。
  3. Through using for reference and demonstrating the technology of video processing system of domestic and foreign, author has put forward a set of video processing system schemes suitable for the china " s actual conditions. by using the digital technology, such as digital encode - decode, digital phase - locked, digital filter, digital image storing, the system schemes realizes tv signal noise reduction and time error elimination in real time, and makes the system be a integrated noise reduction and time based corrector really

    通過借鑒和論證國內外時基校正和視頻降噪的相關技術,作者提出了一套適合於中國國情的視頻處理系統軟、硬體方案實現模擬電視的信號換以及利用編解碼、相、濾波、圖像存儲等技術來實現電視信號實時去噪和消除時基誤差,使系統真正做到集時基校正與降噪一體化。
  4. The paper is completed research of measurement and control system based on dsp under technology. the paper is designed a card with the data - collection conversion and control by adopting mainly tms320f240 among the dsps as kernel processor, with peripheric a / d and d / a circuit epm7128 ' s decode and latch circuit and isa interface circuit

    本論文主要是採用信號處理器dsp中的tms320f240作為核心處理器,結合外部的模換和換電路、可編程邏輯器件epm7128的地址譯碼和存電路和isa介面電路,設計了集採集、換、控制於一身的isa卡。
  5. At last we introduce the realization of all the parts, the problem in the circuit design and the measured data. the results show that the designed system has met the requirement. in this dissertation, direct digital synthesis technology has been used in the phase - locked frequency synthesizer, which can make full use of the characteristics of direct digital synthesis technology such as flexible output wave shape and continuous

    本課題將直接式合成技術用於相頻率合成器中,該方法將直接合成的特點,如輸出波形靈活且相位連續、頻率穩定度高、輸出頻率解析度高、頻率換速度快、輸出相位噪聲低、集成度高、功耗低、體積小等與相環路的頻帶寬、工作頻率高、頻譜質量好等優點有機的結合起來,從而在寬帶的條件下實現了比較好的雜散性能和相噪。
  6. Based on above - mentioned schemes, the power detection system based on tms320vc5410 is designed, which realizes collection, a / d, digital signal processing. keyboard. display and uart ? the ad73360 gather chip commonly used in power system is used in front of the power detection system, and the circuit of frequency multiplication phase - locked is consisted of phase - locked loop device ? d4046 and frequency division device cd4060 to produce the gather signal of ad73360 frequently, the gather wave and re sult can be displayed on lcd

    基於上述方案,本人設計開發了基於tms320vc5410的電力採集檢測系統。基本實現了採集、 a d換、信號處理、鍵盤顯示、異步通信等系統軟硬體設計。該系統前端採用電力系統常用的ad73360採集晶元,相倍頻電路由相環cd4046與分頻器cd4060一起構成,產生ad73360採集觸發信號。
  7. An idea is brought forth to design the total structure of the usb interface ip, the main control logic, the mcu interface ( the function is the same as the pdiusbd12 chip of the philips semiconductor ) and a dpll which is used to synchronize data and separate the clock. this paper also introduces packet recognition, transaction sequencing, sop, eop, reset, resume signal detection / generation, nrzi data encoding / decoding and bit - stuffing, crc generation and checking ( token and data ), packet id ( pid ) generation and checking / decoding,

    提出設計了usb介面電路的整體構架,設計了usb的主要控制邏輯和與mcu的互連的介面(此介面與飛利普的usb介面晶元pdiusbd12兼容) ,也設計了一個相環( dpll )來同步據和分離時鐘,並對同步模式的識別、并行/串列換、位填充/解除填充、 crc校驗/產生、 pid校驗/產生、地址識別和握手評估/產生做了具體的分析。
  8. On the basis of previous work, we developed a new data processing system by use of dsp & oop. the new system overcame the problems existed in the old data processing system successfully, such as the bug which cause program dead loop when the data is too long, and the frequency leak due to principle limit of fft filter. in addition, we eliminated the measurement error brought on by phase warp

    我們在前人的工作基礎上,利用現代信號處理技術和面向對象的軟體開發技術,統一了彈上黑匣子據處理系統的操作平臺,完善了速、掃描角測試據處理系統,修正了原有處理程序中的因據長度過長而導致程序死的bug ;利用有限沖擊響應( fir )濾波器,在濾去噪聲的同時,有效地解決了矩形窗fft濾波的頻譜泄漏問題;另外還解決了因相位偏差而導致的測試誤差。
分享友人