時序的 的英文怎麼說

中文拼音 [shíxùde]
時序的 英文
sequential
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 的 : 4次方是 The fourth power of 2 is direction
  • 時序 : [地質學] sequence; sequential; time sequence; timing sequence; sequence in time
  1. He wanted to become aware of the passage of time.

    他想體察一下時序的推移。
  2. A forecasting method of aero - engine wear faults based on gray time sequence model

    基於灰色時序的航空發動機磨損故障預測模型
  3. Unit root tests on time series with garch - skew - t error term

    誤差項的時序的單位根檢驗
  4. The main works are listed as follows : ( 1 ) the small capacitance measuring circuit for ect based on the charge amplification principle was deeply analyzed and improved. the stray - immunity and the charge injection effect of this circuit were deeply analyzed. the influence of the charge injection effect was eliminated by practical time sequences and circuit structure differential

    本文的主要工作和創新點如下： （ 1 ）對基於電荷放大原理的微弱電容測量電路進行了深入的分析和改進，深入分析了該電路的抗雜散電容性能及電荷注入效應問題，通過時序的合理設計消除了電荷注入效應等因素對測量結果的影響，改進了該電路的數學模型。
  5. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  6. The broadband signal is generated by high speed d / a, and the logical control of the system such as the interface timing control of ide or sdram is implemented by fpgas

    採用高速d / a實現輸出信號的高寬帶，採用多片fpga完成整個系統的時序邏輯控制，比如ide介面時序的實現， sdram的操作等。
  7. Predicts the future values for a time series

    預測一個時序的未來值。
  8. During the design of vxi - bus serial controller module, the functions of vxi - bus including time - sequence for vxi interface, resource management, interrupt process, bus arbitration, are accomplished. to advance the performance and stability, the fpga technic is used to implement the kerneled code including serial bus time - sequence switching to vxi interface time - sequence, the uart, the parameterized baud generator and “ pipeling frame ”. the handle type of data transfer bus for vxi - bus is researched thoroughly, and the format of serial data transfer is designed

    在vxi總線串列控制器設計中，實現了vxi總線控制器的基本功能，包括vxi總線介面時序、總線仲裁、超時處理等;同時利用先進的fpga技術實現了串列總線時序向vxi總線時序的轉換、通用異步收發器（ uart ） 、參數化波特率發生器、流水線結構等功能模塊;在設計中還深入研究了vxi總線數據傳輸的各種操作類型，制定了串列數據傳輸的編碼格式。
  9. Although the annual rainfall in counties of ningnan mountainous area fluctuates in time scales ( year, month, and 10 - days ), the rainfall is on the trend of decreasing in forty years

    以40年為尺度比較年降水量變化都呈降低趨勢；各月降水量隨時序的變化趨勢與年降水量隨時間變化的趨勢有不一致性。
  10. Combinations of such alternate data and temporal dependencies can be used to describe complex process structures as discussed in [ 23, 26 ]

    這些交替的數據和時序的相關的組合能夠用於描述復雜的的過程結構，正如在[ 23 ， 26 ]中討論的。
  11. Asynchronous timing host interface, intel mode or motorola mode

    支持intel motorola時序的異步host介面
  12. There are two cpld chips in the model to control the logic and time sequence

    其中採用了兩片cpld晶元來實現邏輯和時序的控制。
  13. Application of wavelet neural network in prediction of multivariate chaotic economic growth time series

    多變量經濟混沌時序的小波神經網路預測
  14. The virtual instrument there is a kind of logical analyzer often used in experiment measure

    這里所開發的虛擬儀器是用在數字電路實驗測量中跟蹤時序的數字存儲示波器。
  15. However in soc or high performance cpu an in - chip high quality clock is required to guarantee the timing of all chips

    而soc或者高端的cpu一般都採用同步的數字電路設計，時鐘是整個晶元時序的保證。
  16. Facing the willow bathed in the spring sun, i look for the flute melody floating away as if i read once more the timely maxim

    面對沐浴著春光的柳樹，我尋覓著飄遠的笛韻，彷彿又讀到順應時序的箴言。
  17. On the base of investigating the properties of pci address / data bus and the sequence of read, a re - use model of pci address / data bus is proposed

    討論了pci介面ad雙向總線及pci介面讀操作時序的特性。提出了pciad總線再復用模型。
  18. Since a self - timed method is proposed to reduce the requirements of controller, the area is only 72mm x 43mm n a 0. 25mm 1p5m cmos technology, and the capability of setup / hold time measurement is provided in the meanwhile

    我們所提出的是一種自動時序的方法，也因此不需要額外的控制線路，所以在0 . 25微米的cmos製程下的面積只有72微米乘以43微米，同時我們的線路也能夠量測設定時間與保持時間。
  19. At the base of earnestly analysis to the ov7620 working sequence, using its frame synchronization, field synchronization and the pixel - clock signal, completed gathering of the active power meter reading image which is reduced resolutions at the control of mcu

    在仔細分析ov7620工作時序的基礎上，利用其幀同步、場同步和像素時鐘信號，在單片機的控制下完成了對電度表讀數圖像的降低解析度採集。
  20. 2. on simulating events ’ sequential - quality, we gave an idea of “ batch ” ; instead of conforming to events ’ physical time precisely, we consider about their logical sequence. we proposed an events simulation method based on the idea “ batch ”, considering spreading quality of events and time - mapping logic simulating methods

    2 .對于繼電控制系統中事件時序的把握，我們沒有拘泥於其物理上的時間次序，而是從邏輯上來考慮事件的先後相繼關系，提出了邏輯清晰的「批」概念。
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