時鐘周期 的英文怎麼說

中文拼音 [shízhōngzhōuqī]
時鐘周期 英文
clock cycle clock rate
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 鐘 : Ⅰ名詞1 （用銅或鐵製成的響器） bell 2 （計時器） clock 3 （指鐘點、時間） time 4 （沒有把兒的杯子...
  • 周 : Ⅰ名詞1 （圈子; 周圍） circumference; periphery; circuit 2 （星期） week 3 [電學] （周波的簡稱） c...
  • 期 : 期名詞[書面語]1. （一周年） a full year; anniversary 2. （一整月） a full month
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  1. The key to the fft algorithm is the design of butterfly computation and that of the address logic. the whole schema is designed in the top - down design flow and described in the vhsic hardware description language ( vhdl ), basing on these, we do our research on reconfigurable technology. the result indicates that the data processing ability of reconfigurable system improved greatly

    結果表明，可重構系統在數據處理能力方面比以往的系統有了很大的提高，本設計實現的fft重構處理器可工作於60mhz下，完成一個16點fft需要132個主時鐘周期，完成32點fft需要324個主時鐘周期，而且具有一定可重構性，可以方便地將其運算點數進行擴展，或將其他的圖像處理演算法在實時處理系統中實現。
  2. Conditional sensitization of paths is presented from the sensitization theorem of sequential circuits and a novel exact clocking method based on single - period sensitization is proposed. compared with tranditional methods, it is not too optimistic or pessimistic, fit for the exact timing of high - speed circuit design

    在時序邏輯電路精確定時方面，從時序電路的敏化定理出發，使用本文給出的條件可敏化概念，通過對通路敏化性質的判斷建立了一種新的單周期敏化的時序電路最小時鐘周期精確確定方法。
  3. The aim of mips pipeline is that one instruction completed in one period averagely

    Mips流水線的設計目標是要達到平均每個時鐘周期完成一條指令，這就是流水線的極限速度。
  4. There has to be some gap of clock cycles between the unblocking of signals and the next instruction carried by the process, and any occurrence of a signal in this window of time is lost

    從消除信號阻塞到進程執行下一個指令之間，必然會有時鐘周期間隙，任何在此時間窗口發生的信號都會丟掉。
  5. In cpu ticks, the last time that the scheduler timer queue was checked by the scheduler

    在cpu時鐘周期中，計劃程序上次檢查計劃程序計時器隊列的時間。
  6. Today, there are grid schedulers, resource managers, and workload management systems available that can provide the functionality of the traditional batch queuing system or provide the ability to harness cycles from idle desktop workstations

    現在，有一些網格調度器、資源管理器和任務負載管理系統可以提供傳統的批處理隊列系統的功能，或者提供從空閑桌面工作站中利用時鐘周期的能力。
  7. In addition, an experimental system using c language is established, including modules such as representation of waveform polynomial, decision of path senstization, delay computing, clocking based on single - period sensitization, clocking based on multi - period sensitization, test generation considering noise and transformation from bit - level waveform polynomial to word - level polynomial model. they respectively used to test models and techniques proposed in this paper

    另外， :基於c語言本人設計開發了一個實驗軟體系統，該系統包括波形多j一貞式表示模塊、敏化通路判定模塊、延時計算模塊、單周期敏化的最小時鐘周期精確確定模塊、多周期敏化的最小時鐘周期確定方法模塊、考慮噪聲的測試生成模塊和位級波形多項式描述轉化成字級多項式描述模塊，分別用於對本文各章中提出的自動化設計的模型和方法進行實驗驗證。
  8. The design team s goal was to complete one instruction per clock cycle, and to accommodate 300 calls per minute

    設計小組的目標是在每個時鐘周期內完成一條指令，從而每分鐘可以處理300個電話。
  9. Moreover, ck510 employs some low - power design techniques with performance improved. there are three instructions controlling power consumption on system - level and gated clock technique is widely used in ck510. integer computing ability is very important for embedded cpu

    在嵌入式處理器中，整數單元一般進行指令譯碼、指令發射和指令執行，是處理器中的一個重要部件，它直接影響著處理器的性能（ cpi ，每條指令花費的時鐘周期）和功耗指標。
  10. The speed of a computer is usually expressed in cycles per second. typical machines operate at 100 to 200 megahertz or 100 million to 200 million cycles per second

    計算機的速度通常用每秒（執行）的（時鐘）周期來表示。典型的機器運轉在100到200兆赫或者說每秒100到200兆周期。
  11. Based on analysis, we finished the architecture design and the division of the functional modules. allowing for the pic16c57 mcu can not suit the high speed situation, we improving the clock structure through using one clock instead of the original four clock technology. cooperating the instruction work step, the new clock structure executed one clock cycle per instruction

    針對pic16c5x系列微控制器不能適用於高速場合的需要，對其時序結構進行了改進設計，用單時鐘代替原來的四相時鐘技術，採用二級流水結構，配合指令的工作節拍，使指令執行周期縮短為單個時鐘周期。
  12. An external cache hit can cost 2040 clock cycles

    外部緩存命中可以花費2040個時鐘周期。
  13. Each machine cycle takes 12 oscillator or clock cycles

    每個機器周期為12個振蕩器或時鐘周期。
  14. A cpu cache hit can cost your program 1020 clock cycles

    Cpu緩存命中可以花費程序1020個時鐘周期。
  15. Clock cycles - for cpu bound problems

    時鐘周期數
  16. Ipc instructions per clock cycle

    指令時鐘周期
  17. The data in sam will be read out during the hind half of the clock cycle

    後半個時鐘周期則是對sam中的數據進行讀取。
  18. An operating system typically consists of a set of function calls, or software interrupts, and a periodic clock tick

    一個操作系統典型地由一個函數調用集、軟體中斷和定期時鐘周期組成。
  19. For examp1e, the sort arithmetic so1ves 1eve1 partition of combination 1ogic ; the computing input waveform of sensitized path makes the possib1e of conf1rm the minimum c1ock circ1e ; the cyc1e - - based method for synchronous op tajg1fyjct7 : @ + $ { 4it x sequentia1 circuits improve the speed of waveform simu1at ion

    其中，編排級數法確定了組合邏輯的層次關系；通路敏化輸入波形方法決定了最小時鐘周期；基於周期的同步時序電路的模擬演算法加快了模擬的速度等。
  20. The switch power will operate at ccm condition when circuit is set to pwm mode. when pfm mode is selected for the operation mode, the switch power will still operate at pwm condition with the high load, the system will cancel the pwm mode and enter the pfm mode only when the load is drop to a certain threshold to boost the operation efficiency at light load, make the ic has high efficiency within wide load range

    選擇pwm模式，開關電源將工作在ccm模式下;選擇pfm模式，在負載較高的情況下，開關電源仍然工作于pwm模式，只有當負載降低到一定程度時，開關電源才退出pwm模式，而按照pfm工作模式操作，跨過一部分時鐘周期，降低頻率相關功耗，以提高輕負載時低效率的問題，使得開關電源在很寬的負載范圍內都具有高效率。
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