時鐘數據恢復 的英文怎麼說

中文拼音 [shízhōngshǔhuī]
時鐘數據恢復 英文
cdr
  • : shí]Ⅰ名1 (比較長的一段時間)time; times; days:當時at that time; in those days; 古時 ancient tim...
  • : Ⅰ名詞1 (用銅或鐵製成的響器) bell 2 (計時器) clock 3 (指鐘點、時間) time 4 (沒有把兒的杯子...
  • : 數副詞(屢次) frequently; repeatedly
  • : 據Ⅰ動詞1 (占據) occupy; seize 2 (憑借; 依靠) rely on; depend on Ⅱ介詞(按照; 依據) according...
  • : Ⅰ形容詞1 (重復) repeated; double; duplicate 2 (繁復) complex; compound Ⅱ動詞1 (轉過去或轉過...
  • 時鐘 : [電學] [半] clock時鐘計數器 [自動化] clock counter
  • 數據 : data; record; information
  1. In this paper, the design of a specific chip for circuit emulation based on ip is put forward and realized and the main functional modules and the key algorithms including an all - digital adaptive clock recovery method and a dynamic depth buffer algorithm are described in detail

    文章根相關標準提出並實現了一種電路模擬專用晶元的設計方案,並對其中主要功能模塊和關鍵演算法作出了詳細說明,包括一種全字的自適應方法、動態深度緩沖演算法等。
  2. The clock recovery block of usb2. 0 transceiver macrocell consists of phase locked circuit, such as pll and dll ( delay locked loop ). this block use external crystal 12mhz sin signal to produce 60mhz, 120mhz, 480mhz clock signal, and can recover colock signal form date wave. it can support 480mbps ( hs ) and 12mbps ( fs ) word speeds as defined in usb2. 0 specification.

    目的是用鎖相環電路? pll和dll (延遲鎖相環)實現usb2 . 0收發器宏單元utm的模塊。其中pll環路構成的發生器將外部晶振的12mhz正弦信號生成60mhz 、 120mhz 、 480mhz等本地信號。 dll環路依本地信號對外部信號進行
  3. In this paper, the method of in - bore abnormal phenomenon remote detecting is presented. considering of the multi - channel transient signals automatic acquisition, a project of pcm signal hardwire transmission data automatic acquire system is put forward. in this system, a pcm demodulate board is designed, it can decode the pcm code string which contain the information of the multi - channel transient signals, it also can catch the useful data automatically, and transmit these data to upper pc by rs485

    在該系統中,為了能夠解調出包含多路動態信號的高碼速率pcm信號,設計並製作了一種適用的pcm解調板,能夠從pcm碼流中出位信號,從而與發送端保持位同步和幀同步,從而對pcm碼流可靠地解調、緩存,並能根計算機設定的觸發條件自動地捕獲多路信號的有效段,然後利用rs485總線將這些可靠地遠傳至計算機以供顯示、分析和保存。
  4. The logical architecture, protocol, the encoder algorithm, the decoder algorithm and the electronics specification of the tmds which is the core of the dvi and means transition minimized differential signal are described in particular in this paper. and the synchronization and data recovering which mean the central problem in the high speed serial data communications are also analyzed

    本文以dvi介面通訊協議為主線,詳細介紹和分析了作為介面核心內容的tmds ? ?最小變化差分信號的邏輯架構、通訊協議的編碼演算法、解碼演算法、 tmds信號的電氣規范等問題,並著重分析了作為高速串列通訊的關鍵問題的鏈路同步與問題。
  5. This new scheme can detect the malfunction of database system and superintend the operation system connecting to standby database when the host database is paralyzed. the entire switch time can be controlled in several minutes. after the host database restoring, all operations on standby database should be recurred on host database

    自動切換功能可以在主用庫發生異常自動切換到備用庫繼續工作,使庫故障對設備乃至網路的影響間控制在幾分以內,主用以後,在備用庫上進行的操作應該能到主用庫上。
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