模數轉換晶元 的英文怎麼說

中文拼音 [móshǔzhuǎnhuànjīngyuán]
模數轉換晶元 英文
analog-digital chip
  • 模 : 模名詞1. （模子） mould; pattern; matrix 2. （姓氏） a surname
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 轉 : 轉構詞成分。
  • 換 : 動詞1. （給人東西同時從他那裡取得別的東西） exchange; barter; trade 2. （變換; 更換） change 3. （兌換） exchange; cash
  • 晶 : Ⅰ形容詞（光亮） brilliant; glittering Ⅱ名詞1. （水晶） quartz; （rock） crystal 2. （晶體） any crystalline substance
  • 模數 : [物理學] modulus; module; modulo; mod
  • 轉換 : change; transform; convert; switch
  1. Using domestic strained integrated resistor as weighing sensor, at89c52 single chip as control unit, combined with arithmetical magnification, analogtodigital conversion ( a / d ), real time clock, liquid crystal display ( lcd ), and series communication interface, a minitype automatic weighing lysimeter is developed. that made measurement of evapotranspiration become conveniently and effectively in studying on water use of crops

    為了方便、有效地測定植物的蒸散，為水分利用研究提供價廉物美、簡單易用的儀器，本研究利用國產的集成電阻應變式稱重傳感器，採用at89c52單片機作為控制單元，結合運算放大、模數轉換、實時時鐘、液晶顯示、數據存儲、串列通信等外圍介面電路，研製了小型自動稱重式蒸散儀。
  2. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  3. The analog signals are regulated to satisfy the system and analog - to - digital converter ( adc ) ; dsp is the core part and is connected with adcs, a controller of ethernet, a rs - 485 bus transceiver, a can bus transceiver and a clock. the real - time data is disposed by dsp and is transferred to the upper computer when the alarm is happened

    模擬信號調理模塊對輸入的信號進行調理，以達到系統和模數轉換器（ adc ）采樣的要求; dsp作為系統的核心部件，外擴了adc 、以太網控制器、 rs - 485總線收發器、 can總線收發器和時鐘晶元， dsp對實時數據進行處理，當報警發生時將實時數據通過以太網上傳給上位機。
  4. When the cur - cuit resets, the chip remains accepting state, works in burst mode, and adopts dpsk modulation mode. it proceeds quadrature - sampled intermediate frequency signal after the ad9057 has converted, then down - converses, despreads and demodulates. the demodulated baseband signal will be sended into scm to dispose through interrupt

    上電復位后，晶元處于接收狀態，工作在突發模式下，採用dpsk調制方式，將ad9057轉換完的中頻信號進行復正交取樣後下變頻、解擴、解調，通過中斷將解調完的基帶信號送入單片機處理；處于發送狀態時，可將數據擴頻、調制，經ad9768送出。
  5. D / a conversion chip and isolation amplifiers are used to obtain the comparative levels required by isolation channels, which could be set with actual requirement ; it can enhance flexibility of the module. otherwise, four - channel isolation signal sources are exported using d / a conversion chip and isolation amplifiers as well

    另外還利用d / a轉換晶元和隔離運算放大器輸出四路隔離信號源，該隔離信號源能與隔離比較電平通過繼電器進行程式控制切換，這樣擴展了該計數器模塊的功能。
  6. Ti ' s tms320lf2407 is selected as core processor in ert, and analog signal is converted by tms320lf2407 ' s internal adc

    Ert模塊選用ti公司的dsp晶元tms320lf2407作核心處理器，模擬量經過調理電路後由tms320lf2407自帶的模數轉換器進行轉換和處理。
  7. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  8. We have designed the hardware of target identity system with tms320vc5410 fixed - point dsp, completed data acquisition using a / d max 197, successed in communication with computers by max3111. it is comprised that an independent data signal processing and control system based on 5410

    我們選用tms320vc5410定點dsp晶元來進行目標識別系統的硬體設計，使用max197模數轉換晶元完成了數據採集的任務，使用max3111實現了與計算機之間的數據通信，以5410為核心構成了一個自封閉式的數字信號處理與控制系統。
  9. Firstly, the system has a good snr and high accuracy, which is owed to wideband operational amplifier being used, accurate adjustment by da, 12 - bit high sampling ad converter being applied. secondly, data transmission becomes less by using forecasting code technology and dictionary compress technology, which are run by dsp on board

    本採集系統採用400mhz增益帶寬積的運算放大器，運用da高精度校準技術，並選用高采樣率低噪聲的12位ad轉換晶元進行模擬電路和ad轉換電路設計，既保證了數據採集系統的信噪比，又提高了系統測量精度。
  10. The dissertation discusses about field multi - channel nuclear data collecting system based on mcu in detail. the data collecting system adopts mcu ( micro - control units ) at89c55 as controlling core, applying high speed and low power adcs ( analog - to - digital converters ) cmos chip max 191 and 320x240 matrix graphic lcd ( liquid crystal display )

    該系統在硬體上以單片機at89c55為控制核心，以高速低功耗的a d晶元max191作為多道脈沖幅度分析器的模數轉換器件，以320 240點陣圖形液晶顯示屏作為系統的顯示器，根據初步的性能測試，系統已經達到預期的設計目標。
  11. Advanced fpga technology is introduced to improve the integration of digital circuits, and all digital circuits in the original module are integrated in the fpga chips, which could not only reduce the cost, but also improve the reliability and measurement precision of the circuits. high speed digital signal processor ( dsp ) is selected as the coprocessor instead of scm ; it can receive all kinds of commands sent from vxi, analyze and execute the commands, harmonize each section of the module and process the data. higher - conversion - speed comparator chip is adopted to convert the input signals being measured into square waveform signals which could be identified by fpga chip ; it can expand the measurement range of frequency dramatically

    本文在原有vxi總線四通道計數器模塊的設計基礎上，通過對原模塊缺陷的分析，採用一些新的技術和新的電子器件來重新設計該計數器模塊:採用最新的fpga技術來提高數字電路的集成度，將原模塊中的所有數字電路全部集成在fpga晶元中，這樣不僅能節約成本，還能提高電路的可靠性和測量精度;採用高速的數字信號處理器（ dsp ）取代原有的單片機作為協處理器，來接收vxi發來的各種命令，分析命令、執行命令、協調模塊各部分的工作以及對數據的處理;採用轉換速率更高的比較器晶元將輸入的被測信號轉換為fpga晶元能夠識別的方波信號，能極大提高測量頻率的范圍;採用d / a轉換晶元和隔離運算放大器得到隔離通道所需的比較電平，該比較電平值能夠根據實際需求進行設置，能增強模塊的使用靈活性。
  12. Firstly, a data acquisition circuit was designed, which is consisted of ad420, dac702 and ad7701. then, comparing with different usb control ics, an2131 was selected to achieve the control of data acquisition and usb communication. detailed rules to develop a usb device general purpose drivers were introduced, and the virtual instrument application software was developed basing on labview

    首先是數據採集卡的製作，包括由ad420 、 dac702數模轉換晶元構成的模擬輸出通道，由ad7701 、 ad8200構成的模擬輸入通道;然後比較幾種不同的usb介面晶元，選擇帶usb介面的an2131微處理器實現數據採集的控制和usb傳輸功能;之後是usb設備驅動程序的開發和基於labview的虛擬儀器應用程序的設計。
  13. The data - sampling section completes analogue - to - digital conversion using fpga and high speed adc, then transmits these data to processing communication equipment in some format. because fpga has high speed processing capacity, this section can obtain very high sampling rate

    數據採集部分採用現場可編程門陣列（ fpga ）作為與模數轉換器件（ adc ）的介面，在單晶元內實現了同步采樣控制、數據編碼傳輸的功能。
  14. Limited by adc chip ’ s manufacturing processing, it is hard for a single adc chip to acquire the high sampling rate and high precision at the same time. the method of parallel times - interleaved sampling adc system is effective to solve this problem

    受模數轉換晶元發展水平的限制，單片adc晶元很難同時滿足高速高精度的要求，多片adc并行交替采樣技術是突破採集系統這一瓶頸的有效方法之一。
  15. In the dissertation ， we discribe the implementation of large capability video data acquisition system based on pci bus of computer 。 the system is composed of data acquisiton card and corresponding software 。 the data acquisiton card include two acquisition channels ， 8 - bit digitization at rates up to 13. 5mhz 。 frist ， the architecture of the video data acqusition system is studied 。 then ， the function and implementation methode of each module are introduced in detail 。 the control module of the video data acqusition card is implemented by using of the isp technology of cpld and vhdl programming technology 。 the a / d converter used assembler to implement the initialazation programe 。 and the double buffer technology is used for large capability data acqusition. because a contiously large memory is difficult to apply in windows operating system 。 finally we use broland c + + to introduced the devleoping procedure of drivers 。

    在實際的研製過程中，利用cpld的在系統可編程（ isp ）技術和基於vhdl語言的可編程邏輯器件設計技術實現了視頻數據採集卡的控制模塊。在視頻的a / d轉換模塊，用匯編程序模擬i2c總線對初始化a / d轉換晶元。針對大容量數據採集，採用了雙緩沖技術解決wndows操作系統下難以申請到大容童連續內存的間題。
  16. This system combines intelligent measuring instrument with eda and asic design technology, computer hardware and software technology, digital signal processing together. the system hardware includes high - speed data acquisition circuits, analogue signal conditioning circuit, a / d conversion ; fpga circuit with controlling and processing functions and pci interfacing

    系統硬體部分主要有模擬信號調理電路和高速a d轉換晶元組成的數字採集電路； fpga組成的控制和數字信號處理電路； pci介面晶元組成的介面電路。
  17. It is very convenient to realize single - channel or multi - channel analog - to - digital ( a / d ) conversion by using caq without utilizing present integrated a / d conversion chip

    利用計數型模擬量，無須使用a / d轉換晶元，即可方便地實現單道或多道模數a / d轉換。
  18. The task of realtime display on lcd and the complicated control arithmetic are implemented in this smps system, and a microcontroller with high resolution, high speed, high integration, large memory is necessary. in this paper, the design theory of s / h ware module which forms the smps control module and the design scheme is discussed in detail. in this system, the digital compute - control module is implemented with samsung ’ s high resolution, high integration, arm core microcontroller s3c44b0 and ad converter with 16bit resolution produced by ad company, ad7705. the ad7705 implements the data acquisition of the voltage and current feedback signal, and transfer the data to microcontroller through spi bus, which is implemented with s3c44b0 ’ s gpio, for computation and display

    本開關電源系統不僅完成lcd的實時顯示，還要完成復雜控制演算法，需要高速度、高精度、高集成度、大存儲空間的微控制器的支持。本文詳細的論述了構成電源控制模塊的各個軟硬體模塊的設計原理和設計方案。本系統提出了以samsung公司的高速度、高集成度的基於arm架構的微控制器s3c44b0與ad公司具有16位解析度的模數轉換器ad7705晶元構成數字採集運算控制模塊。
  19. The chip of ks0122 is selected for vedio decoding and ad conversion with rgb digital vedio signal output

    其中kso122作為視頻解碼和模數轉換晶元，輸出rob數字信號。
  20. A 16 - bit high speed a / d converter - ad976a is selected in this system, which brings high speed and accords with the requirement of system design

    系統選用16 - bit高速模數轉換晶元ad976a ，數據採集高速準確，符合系統設計要求。
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