浮點制 的英文怎麼說
中文拼音 [fúdiǎnzhì]
浮點制
英文
floating point system-
When the join - structure is suspended, suspension state message between the two suspension points should be exchanged and the digital suspension controller will communicate with the sensor. this function is realized by rs - 485 serial communication
在對搭接結構進行懸浮控制時，兩個懸浮點之間需要實時交換狀態信息，並且傳感器與數字懸浮控制器之間也要傳輸數據，兩類信息交換是通過rs - 485串列通信來實現的。The experiment result shows that the control method designed in the dissertation can ensure the steady suspension of the join - structure. when there is something wrong with one suspension point on a join - structure, the variation of suspension clearance of the other is only about 0. 8mm. it manifests that this method can achieve the join - structure ’ s redundancy function
本文最後在原理型搭接裝置上進行了懸浮控制實驗，實驗結果表明:文中所設計的控制方法能夠實現原理型搭接裝置的穩定懸浮，而且搭接裝置上的一個點出現故障時，另一個點的懸浮間隙最大增加量僅為0 . 8mm左右，由此說明該方法能夠確保搭接結構冗餘功能的實現。It is difficult to ensure the steady suspension of the join - structure if the control method of the two suspension points is designed independently, so the coupling force between the two points must be taken into account. in this dissertation, the model of the join - structure is built. the model is decoupled and linearized by differential geometry method
但是，同一搭接結構上的兩個懸浮點之間具有很強的耦合作用，在對搭接結構進行懸浮控制時，如果對兩個懸浮點獨立進行懸浮控制設計，很難使搭接結構穩定懸浮，因此必須考慮它們之間的耦合作用。The approximate computation method is used in float point computation of system ' s control algorithms on fixed - point dsp after comparing several methods in respect of running time and program space involved, which attains quick computation besides high precision and implements output voltaic with low harmonic and high control precision of frequency
通過從運行時間和佔用空間等方面比較在定點dsp上實現浮點數運算的幾種方法，並選擇了近似計演算法作為系統控制演算法浮點數運算的方法，在保證足夠計算精度的前提下達到計算的快速性，實現低諧波和頻率控制精度高的輸出電壓。Jx5 is a complex microprocessor, which contains cache, microcode rom, instruction prefetch unit, instruction decode unit, integer unit, mmx unit, floating point unit, page unit, bus unit, dp logic, apic and so on. it is very difficulty to test a such complicated microprocessor and receive anticipative fault coverage ratio. so, we must add dft in cpu ’ design
Jx5微處理器是一款結構異常復雜的微處理器，它的內部包含有: cache 、微碼rom 、指令預取部件和動態分支預測部件、指令譯碼部件、整數部件、多媒體部件、浮點部件、分段和分頁部件、總線介面部件、雙處理器介面部件、可編程中斷控制部件等。A data acquisition system with the following features is realized : ? transmission rate up to 100kbyte / s over usb ; ? system ' s dynamic range as high as 120 db ; ? multi - kind of trigger mode control ; ? sampling rate as high as 100 ksps ; ? 12 - bit a / d conversion accuracy ; ? 32k bytes on - board data memory ; ? the system, which was made up of large - scale electronic chips, is small, light and portable, and suitable for field use
本設計最終實現了一個瞬態信號數據採集系統，它具有以下特點： ?採用usb介面進行高速數據傳輸，傳輸速度達100kbyte / s ； ?採用浮點a / d轉換技術，動態范圍達120db ； ?多種采樣觸發控制方式； ?最高采樣率100ksps ； ? 12位采樣精度： ? 32kb數據緩存； ?使用新型大規模電子器件，系統結構緊湊，重量輕，適合野外作業。Editing floating - point values can result in minor inaccuracies because of decimal - to - binary conversion of fractional components
編輯浮點值時，由於要將小數部分從十進制轉換為二進制，因此所得的結果可能存在微小誤差。For example, if you are casting from a floating point value to a boxed
例如，如果要將浮點值強制轉換為裝箱的However, a floating point value cannot represent all real values ; therefore, there are limits on the range of dates that can be presented in dt date
但是，浮點值無法表示所有真實值；因此，可以在dt _ date中顯示的日期的范圍受到限制。The algorithm and its implementation of the leading zero anticipation are very vital for the performance of a high - speed floating - point adder in today s state of art microprocessor design. unfortunately, in predicting " shift amount " by a conventional lza design, the result could be off by one position. this paper presents a novel parallel error detection algorithm for a general - case lza
目前國際上已有很多演算法對前導0預測演算法進行了研究，但是出於設計方法和延遲等方面的限制，大部分前導0預測演算法都為非精確演算法，其預測結果可能與真實加法結果中前導0的個數產生一位的誤差，這個誤差需要在浮點加法的后規格化過程中進行修正，因此反過來又增加了浮點加減演算法的關鍵路徑延遲。After that, it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler. moreover, this paper explores the method of design the floating - point arithmetic unit. referring to the ieee754 - 1985 standard for binary floating - point arithmetic, the algorithm and the behavior description of floating - point adder and multiplier is given, and the simulation and verification is shown at the end of this paper
此外，本文還對處理器的浮點運算單元設計做了初步的研究，以ansi ieee - 754浮點數二進制標準為參考，借鑒了經典的定點加法器和乘法器的設計，嘗試性的給出了浮點加法單元和乘法單元的實現模型和行為級上的硬體描述，並對其進行模擬和驗證。Binary floating - point arithmetic for microprocessor systmes
微處理器系統的二進制浮點運算Binary floating - point arithmetic for microprocessor systems
微處理機系統的二進制浮點運算Binary floating - point arithmetic
二進制浮點運算For more information on these values, refer to ieee standard for binary floating - point arithmetic, available on the web site
有關這些值的更多信息，請參考「二進制浮點運算的ieee標準」 ，該標準可在網站Functions were added to allow access to and control of the floating point control word on both the x87 and sse2 floating point processor
函數，以允許對x87和sse2浮點處理器上的浮點控制字的進行訪問和控制。To modify the fp control word, then the run - time startup code will set the x87 fpu control word precision - control field to 53 - bits, so all float and double operations within an expression will occur with 53 - bit significand and 15 - bit exponent
修改fp控制字，則運行庫啟動代碼會將x87 fpu控制字精度控制欄位設置為53位，這樣，表達式內的所有浮點運算和雙精度運算都以53位有效數和15位指數進行。The floating - point status and control register fpscr captures status and exceptions resulting from floating - point operations, and the fpscr also provides control bits for enabling specific exception types, as well as for selecting one of the four rounding modes
浮點狀態和控制寄存器（ fpscr ）捕獲浮點操作的狀態和異常結果， fpscr還具有控制位，以支持特定的異常類型和對四種舍入模式之一的選擇。Genetic algorithms with hybrid float - code amp; gray - code
浮點數與格雷二進制混合編碼的遺傳演算法Remember that a floating - point number can only approximate a decimal number, and that the precision of a floating - point number determines how accurately that number approximates a decimal number
請記住，浮點數只能近似於十進制數字，浮點數的精度決定了浮點數近似於十進制數字的精確程度。分享友人