浮點減 的英文怎麼說

中文拼音 [fúdiǎnjiǎn]
浮點減 英文
floating subtract
  • 浮 : Ⅰ動詞1 （漂在液體表面） float; drift 2 [方言] （在水裡游） swim Ⅱ形容詞1 （在表面上的） superfici...
  • 點 : Ⅰ名詞1 （液體的小滴） drop （of liquid） 2 （細小的痕跡） spot; dot; speck 3 （漢字的筆畫「、」）...
  • 浮點 : [計算機] floating decimal; floating point
  1. 2 montoye r k, hokenek e, runyon s l. design of the ibm risc system 6000 floating - point execution unit. ibm journal of research and development, 1990, 34 : 59 - 71. 3 oberman s. floating - point arithmetic unit including an efficient close data path

    我們採用90納米cmos標準單元工藝以及synopsys自動布局布線流程進行實驗，實驗結果表明該演算法在高性能雙通路結構的浮點加減運算中引入后，可以使得近路徑的運算延遲整體降低10 . 2 % ，且演算法本身沒有造成新的關鍵路徑。
  2. The research results show that compared with the uniform inlet velocity profile, the exponential inlet velocity profile has more advantages to get lower contaminant concentration, to prevent patient and operating apparatus in the operating area from infection by airborne disease germs and to reduce the airflow rate needed for pollutant concentration control

    研究表明，與通常採用的均勻風速的送風口相比，變化風速的送風口對于降低手術室工作細菌濃度，防止病人手術切口及手術器械等回風氣流攜帶的浮遊細菌再次感染，以及減少手術室的送風量等方面具有明顯的優點。
  3. At first, based on the simple genetic algorithm, an improved ga which adopts a combination of emigration policy and adaptive operator is presented. results of numerical optimization show that the improved ga is effective on preventing premature problem

    本文在基本遺傳演算法的基礎上首先研究了浮點編碼遺傳演算法在數值優化中的應用，通過引進「移民策略」和自適應運算元相結合的方法，改進了基本遺傳演算法在後期進化緩慢的問題，極大地減少了早熟性收斂的現象。
  4. This paper studies fpu ' s algorithm, data - path, control - path, and implements the integration of the powerpc603e system. this thesis mainly discusses the algorithms and the implementation of the floating point unit in the embedded powerpc603e microrpocessor

    論文的研究工作包括： ?研究浮點演算法，主要包括加減法、乘法、除法、開平方以及cordic （ coordinaterotationdigitalcomputer ）演算法。
  5. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  6. The main research area is the structure optimization of floating - point adder, which is intent to minimize the delay of floating - point addition and optimize the circuit structure

    主要研究方向是優化浮點加法器結構，減小浮點加法運算的延遲，優化電路結構。
  7. The algorithm and its implementation of the leading zero anticipation are very vital for the performance of a high - speed floating - point adder in today s state of art microprocessor design. unfortunately, in predicting " shift amount " by a conventional lza design, the result could be off by one position. this paper presents a novel parallel error detection algorithm for a general - case lza

    目前國際上已有很多演算法對前導0預測演算法進行了研究，但是出於設計方法和延遲等方面的限制，大部分前導0預測演算法都為非精確演算法，其預測結果可能與真實加法結果中前導0的個數產生一位的誤差，這個誤差需要在浮點加法的后規格化過程中進行修正，因此反過來又增加了浮點加減演算法的關鍵路徑延遲。
  8. A integrated algorithm of ambiguity resolution is proposed. by using triple carrier phase, integer gauss transformations, qr factorization, cholesky factorization, and geometry constraint, the correlation between ambiguity components is reduced, and more error ambiguity can be discarded, also process of ambiguity searching getting rapidly. the ratio test combining constraint of baseline is used to fix ambiguity rapidly

    利用三差最小二乘求解模糊度浮點解，然後採用整數高斯變換降低模糊度分量間的相關性，再根據qr分解和基線幾何約束減少需搜索的模糊度組合，採用cholesky分解在搜索過程中及早淘汰不正確的模糊度組合，最後利用ratio檢驗與基線幾何約束條件相結合檢驗模糊度組合，盡快固定正確的模糊度。
  9. Based on the spectral irradiance measured with the sun - atmosphere ultraviolet spectrum radiometer ( sauvs ) developed by the institute of atmosphere physics and the changchun institute of optics and fine mechanics, chinese academy of sciences, measuring the direct and scatter irradiance spectrum of ultraviolet waveband which arrives in beijing global surface, giving a method of retrieving the aerosol optical depth ( aod ) and put up with primary results that exponential function can fit the retrieval results according to its visibility, putting forth different coefficients and functions on variable visibility, also giving a primary analysis on the aod in dust - storm day and some contrast between sun - day and dust - storm day, analyzing the ratio between scatter and total irradiance, and its relationship with atmosphere mass and total atmosphere optical depth, lastly contrasting with the survey results by aeronet beijing station, the results of retrieval is in reason, this work gives some help in researching the co - effect of aerosol - radiance - climate and makes preparation for further survey on the radiance characteristics of dust

    利用中國科學院大氣物理研究所與長春光學精密機械研究所合作研製的太陽?大氣紫外光譜輻射計（ sauvs ） ，測量到達北京地表的太陽直接和散射紫外光譜輻射，導出了大氣氣溶膠的光學厚度。初步結果表明：北京紫外波段大氣氣溶膠的光學厚度在絕大部分情況下隨波長的增加而單調減小，用指數函數可以較好地擬合反演結果，統計得到了三個水平能見度狀況下擬合函數的系數值和公式表達式；初步分析了揚沙、浮塵、沙塵暴天氣條件下氣溶膠光學厚度的特點，並與一般晴朗天氣條件下的氣溶膠光學厚度特點做了比較分析；分析了太陽紫外譜輻射中散射輻射與大氣質量、大氣總光學厚度的定性關系和定量表達式；最後與全球氣溶膠監測網路（ aeronet ）北京站的資料做比對，表明反演結果基本合理。
  10. Model xjq has following features ： （ 1 ） dummy bottom is adopted, making the recycling capacity of the recycling cylinder is 2. 5times of the tand. ( 2 ) the stator is a cylinder in structure with its inner wall being vertically ribbed, and slots are placed, leading to better cutting lffect to the slurry. ( 3 ) due to low immerging depth of the rotator, low rurning speed of the impeller, and wide space between the impeller and stator, wearing is low and power consumption greatly reduced. ( 4 ) it is spontaneously aerated

    Xjq型浮選機為仿維姆科型，該機主要有以下幾個特點： （ 1 ）採用了假底，循環簡可使循環量達到槽容積的2 . 5倍; （ 2 ）定子結構為圓筒型，內壁設有立筋條和長孔，對礦漿的前切作用好; （ 3 ）轉子浸沒深度淺，葉輪轉速低，葉輪和定子間隙大，所以其磨損輕，動力消耗大大減少; （ 4 ）可自吸空氣。
  11. This thesis describes some means and measures of controlling vibration and noise of the urban rail transit in the world. emphasis is laid on floating slab track which is a mass - spring vibration isolation system and the best vibration - decreasing measure in rail transit system

    本文敘述了國內外用於控制城市軌道交通振動和噪聲的一些方法和措施，重點討論了浮置板式軌道結構，它是一種質量?彈簧隔振系統，是目前軌道交通中減振效果最好的措施。
  12. As an example we will write a small program to read and evaluate arithmetic expressions consisting of floating point numbers, parentheses and the usual operators for addition, subtraction, and so on

    例如我們要寫一個計算由浮點數、圓括號及一些常用的加、減等算術符號組成的算術表達式的程序。
  13. One pencil is the simulative milling cutter. parameters setting, milling cutter radius compensation, graphics drawing of the work - piece machined, realizing local control, etc. are the tasks of pc, while line & arc interpolation, motion segment acceleration & deceleration control, position protection at a high precision rate and so on are the duty of dsp motion controller. in the end, the system can draw the cutter center track of the work piece ' s program track accurately

    上位pc機主要完成相關參數設定、刀具半徑補償相關運算及繪制被加工工件的輪廓（程編軌跡） 、實現本地控制等內容；下位機dsp控制器則充分利用美國ti公司的tms320c31浮點dsp的高速度、高精度完成運動控制中的實時直線和圓弧數值插補、運動段加減速控制、運動軸行程限位保護等內容。
  14. 1 schmookler m s, nowka k j. leading zero anticipation and detection - a comparison of methods. in proc. 15th ieee symposium on computer arithmetic, vail, co, usa, june 11 - 13, 2001, pp. 7 - 12

    該前導0預測糾正演算法對于尾數和為正數或者負數的情況下都能正確工作，因此不需要事先判斷尾數大小和進行尾數交換，適合在基於雙通路結構的高性能浮點加減運算中採用。
  15. 26th ieee asilomar conference on signals, systems, and computers, pacific grove, ca, usa, october 26 - 28, 1992, pp. 391 - 395. 14 oklobdzija v. an algorithmic and novel design of a leading zero detector circuit : comparison with logic synthesis. ieee transactions on vlsi systems, 1993, 2 : 124 - 128

    而另一方面，該演算法與目前國際上其它類似演算法相比具有面積和功耗上的明顯優勢，根據實驗結果，採用該演算法所實現的電路面積比採用以往類似演算法所實現的電路面積減少了27 ，功耗則降低了28 ，因此特別適合在高性能低功耗的浮點加減運算演算法中採用。
  16. The proposed approach enables parallel execution of conventional lza and its error detection, so that the error - indication signal can be generated earlier in the stage of normalization, thus reducing the critical path and improving overall performance. the circuit implementation of this algorithm also shows its advantages of area and power compared with other previous work

    本文提出了一種新型的基於錯誤糾正機制的前導0預測演算法，該演算法在傳統非精確演算法的基礎上增加了對其結果出錯時的預判機制和規格化過程中的實時糾正機制，從而實現了尾數和規格化時的精確移位，降低了浮點加減運算的關鍵路徑延遲。
  17. The chip area and power savings of not implementing floating - point in hardware can be critical in embedded microprocessors

    在嵌入式微處理器中，硬體中省去浮點（支持）而為實現帶來的晶元面積和功率的減少是至關重要的。
  18. Another possible point of contention during the four days of closed sessions in paris this week may be assertions in early drafts of the report that the recent warming rate was blunted by particle pollution and volcanic eruptions

    在這個本周于巴黎舉行，為期四天，不對外開放的會議中，另一個可能的爭論點是較早的草稿主張最近的暖化速率受到懸浮微粒污染及火山爆發的影響而減緩
  19. Because the calculation involves floating - point data types that are represented in memory by less than 80 bits, however, carrying the extra bits of precision 80 bits minus the number of bits in a smaller floating - point type through a lengthy calculation can produce inconsistent results

    然而，由於計算涉及浮點數據類型（在內存中用少於80位表示） ，在冗長計算中進位多餘精度位（ 80位減去較小浮點型的位數）會產生不一致的結果。
  20. To achieve this, an architectural power model for multi - port register - file is presented firstly. based this model, several practical optimization techniques are applied to reduce the power of register - file. the experimental results show that these techniques can reduce about half power of register - files in godson - 2

    並進一步提出通過減少偵聽浮點總線的項數以及減少指令立即數域的保存等方法減少發射隊列中相應部分的開銷，有效降低了面積和功耗; 4 .提出了物理寄存器堆的低功耗訪問方法。
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