溝道器件 的英文怎麼說

中文拼音 [gōudàojiàn]
溝道器件 英文
channel device
  • : 名詞1 (挖掘的水道或工事) channel; ditch; gutter; trench 2 (淺槽;似溝的窪處) groove; rut; furr...
  • : Ⅰ名詞(道路) road; way; route; path 2 (水流通過的途徑) channel; course 3 (方向; 方法; 道理) ...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • : Ⅰ量詞(用於個體事物) piece; article; item Ⅱ名詞1. (指可以一一計算的事物) 2. (文件) letter; correspondence; paper; document
  1. Under self - heating stress, a general degradation in subthreshold characteristic was observed, which is the consequence of defect generation along overall channel

    這主要是由於在自加熱應力下,整個中都出現了缺陷態的產生,從而使的亞閾值擺幅發生了退化。
  2. Using a strained si layer as a channel in cmosfet may increase the mobility of carriers and thus enhance the device ’ s performance considerably such as transconductance and cutoff frequency

    在sige虛擬襯底上生長應變si層做,將大大增加載流子的遷移率,從而提高的跨導和其他性能。
  3. Based on the hydrodynamic energy transport model, the influence of variation of negative junction depth caused by concave depth on the characteristics of deep - sub - micron pmosfet has been studied. the results are explained by the interior physical mechanism and compared with that caused by the source / drain depth. research results indicate that with the increase of negative junction depth ( due to the increase of groove depth ), the threshold voltage increases, the sub - threshold characteristics and the drain current driving capability degrade, and the hot carrier immunity becomes better in deep - sub - micron pmosfet. the short - channel - effect suppression and hot - carrier - effect immunity are better, while the degradation of drain current driving ability is smaller than those with the increase of depth of negative junction caused by source / drain junction shallow. so the variation of concave depth is of great advantage to improve the characteristics of grooved - gate mosfet

    基於能量輸運模型對由凹槽深度改變引起的負結深的變化對深亞微米槽柵pmosfet性能的影響進行了分析,對所得結果從內部物理機制上進行了討論,最後與由漏源結深變化導致的負結深的改變對特性的影響進行了對比.研究結果表明隨著負結深(凹槽深度)的增大,槽柵的閾值電壓升高,亞閾斜率退化,漏極驅動能力減弱,效應的抑制更為有效,抗熱載流子性能的提高較大,且的漏極驅動能力的退化要比改變結深小.因此,改變槽深加大負結深更有利於性能的提高
  4. Bearings roller bearings and other components. bearing ring precision rolling production line ; a high - precision, super efficient grinding automatic production line ; bearing assembly line ; signal processing equipment ; blank processing equipment ; crowning roller grinder ; end - grinder ; coordinate precision grinder ;, cylindrical grinder ; surface grinder ; spherical roller processing equipment ; raceway grinder ; heat treatment ; needle processing equipment ; polishing processing equipment ; roller - seiki ; rolling auto - sorting machine parts bearing hardness sorting machine bearing cleaning equipment ; contact angle measuring instrument ; contour meter ; bearing life experimental device ; bearing packaging equipment ; roundness instrument ; dynamic vibration noise analyzer ; noise vibration test equipment ; printing machine measuring instrument ; roughness tester ; scanning electron microscope ; finish detector ; inverter ; spindle, wheel, whetstone and other grinding materials

    軸承套圈精密輾擴生產線高精高效磨超自動生產線軸承自動裝配線球加工設備毛坯加工設備凸度滾子磨床雙端面磨床高精度坐標磨床內外圓磨床平面磨床球面滾子加工設備磨床熱處理生產滾針加工設備光飾加工設備滾超精機滾動體自動分選機軸承零硬度選別機軸承清洗設備角接觸測量儀輪廓測量儀軸承壽命實驗裝置軸承包裝設備圓度儀振動噪音動態分析儀振動噪音測試裝置印字機加工測量儀粗糙度測試儀掃描電子顯微鏡光潔度檢測儀變頻電主軸砂輪油石和其他研磨材料
  5. Based on the hydrodynamics energy transport model, the degradation induced by donor interface state is analyzed for deep - sub - micron grooved - gate and conventional planar pmosfet with different channel doping density. the simulation results indicate that the degradation induced by the same interface state density in grooved - gate pmosfet is larger than that in planar pmosfet, and for both devices of different structure, the impact of n type accepted interface state on device performance is far larger than that of p type. it also manifests that the degradation is different for the device with different channel doping density. the shift of drain current induced by same interface states density increases with the increase of channel do - ping density

    基於流體動力學能量輸運模型,對雜質濃度不同的深亞微米槽柵和平面pmosfet中施主型界面態引起的特性的退化進行了研究.研究結果表明同樣濃度的界面態密度在槽柵中引起的特性的漂移遠大於平面,且電子施主界面態密度對特性的影響遠大於空穴界面態.特別是雜質濃度不同,界面態引起的特性的退化不同.摻雜濃度提高,同樣的界面態密度造成的漏極特性漂移增大
  6. According to the analysis of physical quantities in the body, we got a conclusion that the effect of pn junction on schottky is through its depletion layer and the gap between two pn junctions

    通過對體內各物理量的定量分析,得出pn結對肖特基的作用是通過其耗盡層和兩pn結之間的間隙來影響肖特基的導電這一結論。
  7. Semiconductor discrete device. detail specification for silicon n - channel deplition mode field - effect transistor of type cs146

    半導體分立. cs146型硅n耗盡型場效應晶體管.詳細規范
  8. Semiconductor discrete device. detail specification for type cs141 silicon n - channel mos deplition mode field - effect transistor

    半導體分立. cs141型硅nmos耗盡型場效應晶體管詳細規范
  9. Semiconductor discrete device. detail specification for type cs140 silicon n - channel mos deplition mode field - effect transistor

    半導體分立. cs140型硅nmos耗盡型場效應晶體管.詳細規范
  10. Semiconductor discrete device. detail specification for type cs5114 cs5116 silicon p - channel deplition mode field - effect transistor

    半導體分立. cs5114 cs5116型硅p耗盡型場效應晶體管詳細規范
  11. Semiconductor discrete device. detail specification for type cs4091 cs4093 silicon n - channel deplition mode field - effect transistor

    半導體分立. cs4091 cs4093型硅n耗盡型場效應晶體管詳細規范
  12. Semiconductor discrete device. detail specification for types cs4856 cs4861 silicon n - channel deplition mode field - effect transistor

    半導體分立. cs4856 cs4861型硅n耗盡型場效應晶體管詳細規范
  13. Semiconductor discrete device. detail specification for silicon n - channel deplition mode field - effect transistor of type cs1 gp, gt and gct classes

    半導體分立gp gt和gct級cs1型硅n耗盡型場效應晶體管.詳細規范
  14. Semiconductor discrete device. detail specification for silicon n - channel deplition mode field - effect transistor of type cs4. gp, gt and gct classes

    半導體分立gp gt和gct級cs4型硅n耗盡型場效應晶體管.詳細規范
  15. Semiconductor discrete device. detail specification for silicon n - channel deplition mode field - effect transistor of type cs10. gp, gt and gct classes

    半導體分立gp gt和gct級cs10型硅n耗盡型場效應晶體管.詳細規范
  16. In order to investigate the effect of high - field hot - carrier on devices and circuits, the electrical stress experiment is carried out with 1. 2 n m, 1. 0 n m and 0. 8 u m channel length home - made mosfet ' s by the monitor system with ate and cat technology. by using the fresh and degraded experiment data, bsim2 model parameters are extracted

    為了分析研究高場熱載流子效應對和電路特性可靠性的影響,採用自動測試與cad技術相結合的監測系統,對國內長度1 . 2 m 、 1 . 0 m和0 . 8 m的mosfet進行了電應力退化實驗,並根據實驗結果提取了退化前後的bsim2模型參數。
  17. The source drain extension ( sde ) structure and its reliability are thoroughly studied. first, it is shown that the sde structure can suppress short channel effect effectively and the parasitic resistance at the sde region has an effect on performance. it is proposed that increasing the dose condition in the sde region can reduce the parasitic resistance and should be adopted to achieve high performance for deep submicron devices

    本文對深亞微米源漏擴展mos結構及其可靠性進行了深入研究,首先通過模擬驗證了源漏擴展( sde )結構對短效應的抑制, sde區寄生電阻對性能的影響以及sde區摻雜濃度的提高對性能的改善,指出了尺寸進一步減小后,提高源漏擴展區摻雜濃度的必要性。
  18. The model of threshold voltage solves the problems of nonuniformly doped channel, short channel effect, implantation for adjusting threshold voltage, edge capacitance of gate, etc. not only the model can be used in ldmos, but it can perfectly describe the short channel effect of threshold voltage for all other mos devices

    其中,閾值電壓模型解決了非均勻摻雜、短效應,調閾值注入,柵邊緣電容等問題。該模型不僅適用於ldmos ,也可以很好地描述所有的mos閾值電壓的短效應,嚴格證明了短效應會引起閾值電壓的減小。
  19. Compared with the similar research results, the weighted control ic here has the following characteristics : ( 1 ) the circuit structure is simpler ; ( 2 ) the chip ' s fabrication is compatible with standard cmos process ; ( 3 ) n - mosfets with high w / l ratio and short channels are used for weighting and output to reduce the insertion loss ; ( 4 ) the weighting factor varies in a relatively wide range with the controlling signals ; ( 5 ) input and output impedance approach 50 in low frequency ( e. g. 50mhz ), while in higher frequency they slightly deviate from 50, hence the energy reflection lower than 0. 1 ; ( 6 ) it completes the functions of sampling, weighting, controlling and summing of high frequency analog signals

    它的加權控制電路與已報的相關電路相比具有如下特點:電路結構簡單;製造工藝與普通cmos工藝兼容:短,高寬長比的nmos晶體管具有低的通導電阻,將其作為加權、輸出可降低由電路引起的插入損耗;改變加權信號,可實現權值在較大范圍內的連續變化;輸入、輸出阻抗在低頻(如50mhz )下接近50 ,而在高頻下略有偏離50 ,但反射系數均低於0 . 1 ;實現了對高頻信號的取樣、加權、控制、疊加功能的迭加。
  20. It shows that the active channel with sizeable optical gain and a substantial increase of the refractive index are promising for the realization of active waveguide tunable laser

    研究表明,室溫下有源具有較大的光增益和折射率增量,有望實現可見波段的可調諧有源光波導激光
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