硬核數碼 的英文怎麼說
中文拼音 [yìnghéshǔmǎ]
硬核數碼
英文
hardcore techno-
After elaborating the principle of an 802. lib key modulation scheme - complementary code keying ( cck ), this paper proposes and realizes a hardware circuit solution of 802. 11b pcmcia wlan interface card, which can reliably offer a maximal 11mbps data rate and freely switch within 14 working channels in 2. 4ghz frequency band
接著在詳細闡述了802 . 11b協議核心調制技術?互補碼鍵控（ cck ）的原理的基礎上，本文提出並實現了一種峰值傳輸速率為11mbps的802 . 11bpcmcia高速無線網卡的硬體電路設計方案，在2 . 4ghz頻段該網卡可在14個工作通道上自動切換，實現高速突發數據的可靠傳輸。At last the algorithm of ddmf is achieved by the investigation tool of altera company ? quartus ii and the vhdl language, and its ip core is also achieved which is used not only in the satellite navigation position system, but also in the long pn code dsss system. ddmf investigated in the dissertation gives a good way to design the rapid pn code acquisition in the beidou project, and the technology has the definite theory and practice significance
此外還應用altera公司的最新的fpga開發工具quartusiiv5 . 1 ，採用了國際標準的硬體描述語言? vhdl語言，對數字差動匹配濾波器和傳統匹配濾波器演算法予以實現，開發了該演算法的軟ip核，可以對所應用的擴頻碼長度， a / d采樣后的數據量化階數，所用擴頻碼等可進行隨意改寫。The main content is design of digital man - machine interface system, a speed regulating system of good stabilization and dynamic performance ; software for appraising the performance of wire feeder. the first, a digital man - machine interface system using at89s8252 singlechip is designed. the system uses sd7218a keyboard / display chip with serial bus interface
首先，人機交互系統選用at89s8252為核心控制晶元，選用具有串列總線介面的sd7218a鍵盤/顯示晶元完成了數字化人機交互系統軟、硬體設計;採用rs - 485總線實現主控系統和人機交互系統的數據交互;系統採用數字編碼器和鍵盤配合的方式實現焊接參數的選擇和設定，同時還具有最優參數存儲、調用等功能。( 3 ) study deeply the structure of fat 16 file system and the characteristic of flash disk, and develop the file management software of flash disk to manage nc files effectively according to the management idea of fat 16 file system. ( 4 ) research the module and protocol of reliable communication in serial network, which are composed of arm main control board, dsp motion control board, keyboard board, i / o control board and encoder signal collection board, and then develop communication software of the serial network. ( 5 ) study the principle of displaying char in lcd and the method of embedding font library into operating system, and research deeply the method of embedding chinese font library into os in the light of the characteristic of chinese
本論文的主要研究內容如下： （ 1 ）研究uc os -實時嵌入式操作系統在硬體平臺上的移植及其佔先式內核的任務調度原理，合理分割銑床控制系統的管理任務，根據任務的要求賦予不同的優先級和調度時間，保證任務的執行效率和實時性； （ 2 ）開發底層設備驅動程序和應用程序介面（ api ）函數，以便於進行系統應用軟體的開發； （ 3 ）深入研究fat16文件系統的結構和固態盤的硬體特性，參照fat16文件系統的管理思路，開發固態盤文件管理軟體以有效管理nc代碼文件； （ 4 ）深入研究由arm主控板、鍵盤板、 i o控制板、編碼器信號採集板等裝置組成的串口通訊網路可靠通信的模型及其通訊協議，開發串口通訊網路通信軟體； （ 5 ）研究字元的顯示原理和在操作系統中嵌入字庫的方法，在此基礎上結合漢字的特性深入研究中文字庫的嵌入方法，開發中文字庫嵌入軟體，滿足開發操作界面的信息要求； （ 6 ）深入研究三維圖形坐標變換的原理，開發實用的三維加工軌跡顯示軟體，便於操作者對零件的加工過程進行監控和診斷。The software and hardware design of portable digital testing equipment based on tms320vc5510 are presented, which is the newly efficient and low power consuming dsp of ti corporation. the system realizes the requirement of sample theorem when sampling the wide spectrum signal with an equivalent sample technology, integrates the lcd control core in cpld and makes cpld as lcd controller instead of specific lcd controller, and makes the colorful stn - lcd as terminal displaying facility. the system suits the development requirement of the new portable digital testing equipment with the specialities of low power consuming, high integration and good displaying interface
本文介紹了以ti公司新一代高效率、低功耗數字信號處理器tms320vc5510為核心實現的便攜式測試設備的軟硬體設計，以等效采樣技術實現采樣寬頻譜周期信號對采樣定理的要求，在cpld內集成完整的lcd控制核代碼，並以cpld作為lcd控制器取代專用控制器，以stn彩色lcd作為終端顯示設備，該方案具有功耗低、集成度高、良好的人機介面等特點，適合新一代便攜式測試設備的發展需求。Because trimedia dsp tm1300 has relative more complex hardware structure and parallel process mechanism, we described it ' s software development environment. then the software schedule and the reference key function of this algorithm were discussed
因為trimedia晶元有相對復雜的硬體結構和并行處理機制，我們對其軟體開發環境進行了描述，接著敘述了碼率轉換演算法核心部分的流程框圖和演算法中所用到的函數。This system is based on two altera ’ s statixii series fpga chips ep2s180f1020c5, and the tunner dtt7579 and the chip ad9433, together composed the main hardware platform. the hardware description system running on the fpga is the core of digital down converted sysgtem, synchronization system, estimation and equalization of channel system, 3780 - point fft ofdm demodulation system, frequency equalization system and ldpc decoding
以兩片altera公司的stratixii系列ep2s180f1020c5級聯為基礎構建了系統主硬體處理平臺，結合湯姆遜公司的調諧器dtt7579以及ad9433組成了系統的硬體構架fpga可描述硬體系統的核心任務包括數字下變頻，同步和通道均衡與估計， 3780點fftofdm解調，頻域均衡， ldpc解碼。That is, after decoding ac3 bit stream by software, the models are set up for the key sub - functions to get the extended instructions of risc core and the key operation is mapped to special instructions. next, the detail hardware of extended instruction is given
通過對ac3解碼匯編程序及其在virgo核上運行的結果進行分析提取出佔用cpu運行時間較多的子函數，再對這些子函數建立模型提取出關鍵操作並將其綜合成特殊指令，文中給出了這些指令的具體硬體實施框架和原理。In this paper, the principle of the scientific ccd digital camera system and its key techniques in software and hardware design are systematically introduced. this paper has researched a cooled scientific grade ccd digital camera with controllable integration time, readout speed and real time data acquisition
本文系統性的介紹了ccd相機系統軟硬體設計的關鍵技術，以th7883面陣ccd傳感器為核心器件，研製了帶有致冷功能、曝光時間和讀出速率可控、實時採集的科學級ccd數碼相機。An optical filter on infrared band and an optical tube for gathering light are also used. finally, the design of controller with complex programmed logic device chips and mcu are presented in this thesis, both of the hardware and software included. the system works well at 4mbit / s
最後，控制系統的設計採用了單片機和cpld的組合結構，以單片機為控制核心，由cpld實現編碼解碼及串並轉換等數據處理，並完成了所有硬體的設計和軟體編程及模擬測試。With performance of up to 900 million floating - point operations per second ( mflops ) at a clock rate of 150 mhz, tms320c6711 is fit to tackle with the problem. this thesis made a deep research on the h. 263 standard and the tms320c6711. we propose the plan of the software and the hardware for the realization of the h. 263 protocol which include the structure of the whole program, the c code of the key algorithm of the h. 263, the c code of some subprogram, and the circuit for image processing with the tms320c6711 as the processor. furthermore, we optimize some subprogram in common use to make the coding more quickly. we encode a video sequence with the tms320c6711dsk successfully, even if the compression rate is as high as 100, video effect we get after decoding the code stream is satisfying
首先系統地研究了h . 263協議編碼器的基本演算法，句法，碼流結構和tms320c6711dsk的原理結構以及ccs2 . 0的開發環境；在系統的軟體方面給出了總體流程圖，對于h . 263協議編碼器的某些核心演算法和子程序，給出了部分源代碼，對于dsp的各種代碼優化方法進行了討論，並且對代碼進行優化，從而在提高系統處理速度的同時減少代碼大小和內存需求量；硬體方面以tms320c6711為核心處理器，提出了基於tms320c6711的圖像處理平臺的硬體實現方案，並給出了原理電路圖；最後在tms320c6711dsk上成功對視頻數據進行高壓縮比（ 100倍以上）的編碼，對回傳的結果解碼后得到了令人滿意的效果。We adopt a ping - pong buffer mechanism to guarantee the system ' s real - time implementation. in the hardware design, we use adsp2188n and codec chip msm7702 to accomplish the algorithm and flash memory sst391f080 to store the startup code. assembly language code and some necessary initialization data
在硬體設計中，本系統以adspzi88n為核心，結合codec晶元msm7702完成編解碼演算法，使用flash晶元sst39lto80來存儲系統的啟動程序、匯編語言程序和初始化表格數據，使用話筒和聽筒來完成語音的輸入輸出。This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process
本文研究了一種實用的步進電機細分驅動系統，由數字控制模塊、驅動模塊和電源模塊組成，系統以at89c52單片機為核心，通過單片機的i o口、定時器計數器中斷來實現外部事件監控以及控制信號的產生，系統將可編程邏輯器件（ pld ）器件和在系統編程（ isp ）新技術引入到細分驅動環行分配器的設計，通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構，大大簡化了電路，並提高了電路抗干擾能力。使系統實現參數存儲，速度數字控制，數碼顯示，進退刀控制等功能。The block cipher is one of the two aspects of the modern applied cryptography systems. it has some characteristics - the fast speed, the easy standardization, convenient implement by software and hardware, and so on. the block cipher always is the main parts of the data encryption, digital signature, authentication and key management in the security of information and network
分組密碼是現代密碼體制發展的兩個方向之一，它具有速度快、易於標準化和便於軟硬體實現等特點，通常是信息與網路安全中實現數據、數字簽名、認證和密鑰管理的核心體制，因此分組密碼在計算通信和信息系統安全領域中具有廣泛的應用。In the gsm system, error - control is the key - technology of the wireless - interface. combining the error - control technology with the software and hardware, in the baseband transmit part of the gsm mobile station test set, i ' ll provide a module which can accomplish the physical layer ' s protocol of the wireless - interface., and the fec technologies, such as cyclic code, convolutional code and viterbi decode, can be achieved by the baseband module, too
差錯控制技術是gsm移動通信系統無線介面協議的核心內容，本課題的任務是將差錯控制技術的原理與相關的軟、硬體結合起來，在gsm移動電話綜合測試儀的數字基帶模塊中實現gsm無線介面的物理層協議，完成差錯控制技術中的循環碼、卷積碼、交織、 viterbi譯碼等前向糾錯技術。分享友人