硬體字元 的英文怎麼說

中文拼音 [yìngtǐzìyuán]
硬體字元 英文
hardware character
  • 硬 : 形容詞1 （堅硬） hard; stiff; tough 2 （剛強; 堅定; 強硬） strong; firm; tough; obstinate 3 （勉...
  • 體 : 體構詞成分。
  • 字 : Ⅰ名詞1 （文字） character; word 2 （字音） pronunciation 3 （字體） form of a written or printed ...
  • 硬體 : hardware
  1. Eventually, the digital correlator of the modificatory structure is designed and realized by fpga, and it manifests very high and reliable correlative performance

    最後用fpga晶元設計並硬體實現了修正結構的數字相關器，這種結構的數字相關器具有很好的工作性能。
  2. Based on the tms320f240 controller produced by ti company, the hardware and software designation of the symmetrical voltage space - vector pwm is presented. designed a digital controller with tms320f240 to modulate the speed of the motor, in which the keyboard and led display are bedded. it can be to set the frequency of motor and display the run frequency of motor in real time

    基於ti公司的tms320f240控制晶元，介紹了對稱空間電壓矢量硬體設計和軟體設計，採用tms320f240設計了一款用於電機變頻調速的數字控制器，該控制器上設計有鍵盤和led顯示，可以設定和動態顯示電機運行頻率。
  3. By thorough analysis and synthetize this paper made a frame of the system of intelligent instrument and its hardware structure. as followed, this paper depicted design details of intelligent instrument " s hardware, it included the design of interface circuit, data commutations and digital logic of dsp, mcu, internet ' s chip and isp ' s apparatus etc., and have designed schematic map and circuit. so it accomplished the full design of hardware / software of the new type intelligent instrument

    本文具體給出了新型智能儀器硬體結構及實現，描述了智能儀器硬體設計細節，包括數字信號處理器、單片機、 internet接入晶元、可編程數字/模擬器件等在新型智能儀器中的介面電路設計、數據通信設計和數字邏輯設計等，詳細地給出了設計原理圖和電路圖；給出了新型智能儀器的軟體設計細節，從而完成了新型智能儀器完整的軟硬體設計。
  4. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。
  5. Due to the hardware characteristic ' s limitation, such as the poor speed of a / d, d / a conversion and dsp process, the most part of sr system adopt middle course. that is to say, by using the special digital converter or running relevant arithmetic, it converts the radio signal to intermediate frequency signal and completes the base - band signal process that is n ' t the veriest sr and is named " software defined radio ( sdr ) "

    由於受到硬體性能如a d 、 d a及dsp晶元處理速度的限制，目前的軟體無線電系統多採用折中的實現方案，增加專用的數字變頻器或者運行數字變頻演算法，將射頻信號變頻到中頻，然後再進行基帶信號處理，這樣的軟體無線電系統又被稱之為「軟體定義無線電」 ，它並不是真正意義上的軟體無線電。
  6. The bt819a of brooktree corp is selected for front - end video a / d transforming, bt852 as video d / a, and the tms320c6711 of ti corp. selected for h. 263 core algorithm processing in the system hardware design

    該系統硬體設計選擇了conexant公司的bt819a晶元為前端視頻採集a d晶元， bt852晶元作為後端視頻的輸出d a晶元，完成對視頻信號數字化和逆處理，為dsp對系統功能處理作好準備。
  7. Evolvable algorithms are applied to functional digital combinational logic circuits with the structure of classicepglo chip of altera co. and the detailed analyses of typical examples are also given

    結合altera公司classicep610晶元的結構，研究了將演化演算法應用於函數級數字組合邏輯電路的硬體演化，並且對典型實例進行了詳細分析。
  8. The hardware in this system includes a digital signal processor, an analogy input channel, a lcd, an analogy output path, a keyboard input part, a guard circuit and a logic control circuit

    該系統硬體包括數字信號處理器晶元、前向輸入通道、液晶顯示器、模擬量輸出部分、鍵盤輸入部分、保護電路部分和邏輯控制部分。
  9. Different from general microprocessors, dsps have harvard architecture or enhanced harvard architecture and units of dsps can work in parallel. to perform multiplication in high speed, dsps also include hardware multiplier in its cpu

    與通用微處理器不同，數字信號處理器採用了哈佛總線結構或改進哈佛總線結構，具有高度的并行性，為了快速完成乘法計算在cpu中增設了硬體乘法單元。
  10. At the aspect of hardware design, it adopts pulse distributor and the technology of single polar voltage drive to accomplish the function of controlling and driving stepmotor ; it adopts the technology of pulse width modulation and cmos h - bridge drive to accomplish the function of controlling and driving dc servomotor ; it adopts d / a convertor to accomplish the function of controlling ac transducer ; it adopts the technology of digital phase detection to accomplish the function of detecting the feedback position signal of induction phase shifter ; it adopts dsp ’ s capture cell to accomplish the function of detecting the feedback position signal of photoelectric coder

    硬體方面，採用脈沖分配器和單極性電壓驅動技術實現了步進電機的控制和驅動功能;採用脈寬調制技術和cmos互補h橋驅動技術實現了直流伺服電機的控制和驅動功能;採用d / a轉換器實現了交流變頻器的控制功能;採用數字化相位檢測技術實現了感應移相器位置反饋信號的檢測功能;採用dsp的捕獲單元實現了光電編碼器位置反饋信號的檢測功能。
  11. The main content is design of digital man - machine interface system, a speed regulating system of good stabilization and dynamic performance ; software for appraising the performance of wire feeder. the first, a digital man - machine interface system using at89s8252 singlechip is designed. the system uses sd7218a keyboard / display chip with serial bus interface

    首先，人機交互系統選用at89s8252為核心控制晶元，選用具有串列總線介面的sd7218a鍵盤/顯示晶元完成了數字化人機交互系統軟、硬體設計;採用rs - 485總線實現主控系統和人機交互系統的數據交互;系統採用數字編碼器和鍵盤配合的方式實現焊接參數的選擇和設定，同時還具有最優參數存儲、調用等功能。
  12. This dissertation majorly researchs and designs full digital dc driving system with fuzzy control. it makes a scheme argumentation firstly, analyzing the pid algorithm and fuzzy control algorithm the ordinary digital pulse trigger algorithm and the double remainder method of pulse trigger in detail, and fuzzy control and the double remainder method are put forward to settle the under - mentioned problems, namely, the new viewpoint and the task having finished in this dissertation as follows : ( 1 ) in rder to overcome the influence of dc motor ' s parameter changing with time and nonlinear on the control system performance, this dissertation adopts fuzzy control as outside regulator and pi control as inside regulator in double regulators of the full digital dc motor driving system design ;. ( 2 ) aiming at the pulse trigger reliability of the ordinary d igital pulse trigger being low and leaking the pulse or the order of pulse confusion, this paper adopts the double remainder algorithm with short response time high pulse trigger reliability good adaptability and anti - jamming ; ( 3 ) this dissertation adopts tms320lf2407 which has good performance as major control chip this chip has power function with fast calculation capability, and accomplishes the software and hardware design in the dc motor driving system with fuzzy control ; ( 4 ) this dissertation also puts emphases on anti - jamming in hardware and software ; ( 5 ) after having designed the sample of full digital dc motor driving system with fuzzy control, a lot of experiments are performed to verify the performance and settles problems during experiment. the result of experiment proves the feasibility of design

    首先進行了方案論證，對模糊控制演算法和數字pid調節演算法、觸發脈沖的一般演算法和雙余演算法進行了詳細地研究分析，提出應用模糊控制和雙余法解決下述問題，即該論文主要的新見解和所完成的工作： （ 1 ）為了克服直流電機參數時變性和非線性因素對控制性能的影響，本設計中，雙閉環調速系統的外環採用模糊控制，內環採用pi控制，使系統在一定范圍內對直流電機參數變化和非線性因素影響有自適應能力； （ 2 ）針對常規數字觸發器演算法中觸發脈沖的可靠性不高，經常出現漏脈沖或是脈沖混亂的情況，本文採用雙余法，該演算法具有響應快，可靠性高，具有良好的適應性及抗干擾能力； （ 3 ）本設計中採用了速度快、功能強的tms320lf2407作為系統的主控晶元，應用該晶元完成系統的軟硬體設計： （ 4 ）本文對系統抗干擾的軟硬體措施進行了重點研究； （ 5 ）設計了具有模糊控制的全數字直流傳動系統原理樣機，並進行了試驗驗證，對試驗過程中出現的問題及時解決，最終實驗結果證明設計是可行的。
  13. The design of high - voltage circuit based on pwm technology is briefly described. the closed - loop current control theory using analog instruments is fully discussed, followed which is that using digital instruments. it is an important part that the hardware and software design of the single chip - two arms and two chips - two arms current control circuits with a new chip applicable to digital current control system

    簡單介紹了基於開關電源技術的高壓電路設計；詳細講述了模擬穩流電源的閉環穩流原理，並在此基礎上討論了利用數字電路實現穩流的原理及可能性；選擇出適合數字穩流系統的新型晶元，完成了單片雙路穩流系統、雙片雙路穩流系統的軟硬體設計；給出了一種簡單易實現的比例?積分控製程序。
  14. These results prove that the charging action of the power supply is right. the simulation method is applied with other power supply system. at the same time, the hardware system of 2qkv - 60kw high - voltage capacitor direct current charging power supply is described in this paper, and discuss why designed a full digital phase - shifting pulse circuit

    同時，本文敘述了20kv ? 60kw高壓電容直流充電電源的硬體電路的設計，其中討論了為什麼不採用已有的uc3875 、 uc3879等晶元來產生zvspwmdc dc變換器的移相脈沖，設計了全數字式移相脈沖產生電路。
  15. To realize nolinear excitation controller, it must be improved that the disposal speed of nolinear excitation control " s signal. with analyzing and comparing all kinds of microcomputer excitation controller, a new microcomputer excitation control scheme is offered that is based on dsp controller while the cpld chip is utilized for realizing the function of pulse trigger. it is described in detail that the method of realizing controllable silicon digital logic by verilog hardware describe language and the designed digital pulse trigger " s veracity was validated by digital simulation

    論文進一步針對非線性勵磁控制要求信號處理速度高、信息量大的特點，在對目前微機勵磁控制器分析基礎上，提出採用dsp控制器晶元作為核心處理器的微機勵磁控制器的解決方案，運用復雜可編程邏輯器件cpld晶元實現可控硅同步脈沖觸發單元，並簡要說明了verilog硬體描述語言和數字脈沖形成邏輯的方法，通過電路數字模擬對所設計的數字觸發單元進行了驗證。
  16. Both of these two solutions are based on the same hardware of satellite stb of sti5516 chip

    兩方案硬體均採用以sti5516晶元為主的衛星數字電視機頂盒，軟體在st公司os20平臺和windows平臺實現。
  17. The state ' s silicon valley also contributed to english ' s high tech lingo : software, hardware and megabyte

    這一州的矽谷也增加了英語的高科技字匯：軟體、硬體及百萬位元。
  18. It has application in dvd and htdv and dvb - c and video transmission in network, etc. two parts the principle of video reduced on mpeg - 2 standard and the designing of encoder and debugging on encoder are primarily expatiated on in this dissertation

    本文編碼器採用fujitsu公司的mpeg - 2編碼晶元mb86390用硬體來實現視頻信號的壓縮，編成mpeg - 2碼流，可應用於dvd 、數字電視、 dvb - c及視頻的網路傳輸等。
  19. In this paper, real time torpedo homing system. which is based on adsp ? 2106x to be discussed. high speed signal parallel processor system is researched, it is made up of intel 80c186eb processor main board and adsp _ 2106x. it can be come true using this system for the accuracy parameter estimation of underwater target which moves on high velocity

    本課題是以高速并行數字信號處理晶元adsp ? 2106x為核心，以intel80c186eb微處理器構成的cpu模塊為主控板，構成完整的高速并行數字信號處理機硬體系統，該硬體系統可以成功地實現現代魚雷自導的水下高速運動目標參量實時精估演算法。
  20. We have designed the hardware of target identity system with tms320vc5410 fixed - point dsp, completed data acquisition using a / d max 197, successed in communication with computers by max3111. it is comprised that an independent data signal processing and control system based on 5410

    我們選用tms320vc5410定點dsp晶元來進行目標識別系統的硬體設計，使用max197模數轉換晶元完成了數據採集的任務，使用max3111實現了與計算機之間的數據通信，以5410為核心構成了一個自封閉式的數字信號處理與控制系統。
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