硬體核對 的英文怎麼說

中文拼音 [yìngtǐhéduì]
硬體核對 英文
hardware check
  • 硬 : 形容詞1 （堅硬） hard; stiff; tough 2 （剛強; 堅定; 強硬） strong; firm; tough; obstinate 3 （勉...
  • 體 : 體構詞成分。
  • 核 : 核構詞成分。
  • 對 : Ⅰ動詞1 （回答） answer; reply 2 （對待; 對付） treat; cope with; counter 3 （朝; 向; 面對） be tr...
  • 硬體 : hardware
  • 核對 : check; collate; verify; collating; verification; verifying; checking
  1. Aimed at the trends of ftu in our country and overseas, the thesis first give the summary of characteristics towards current feed terminal unit used in electric automation, then detailed introduce the adoption of microchip msp430f149 for the cpu design

    論文結合國內外ftu的現狀和發展趨勢，對ftu的主要功能進行了分析研究，設計了以ti公司msp430f149單片機為ftu核心的控制器系統硬體電路，並對硬體電路的設計原理、電路組成及元器件選擇進行了詳細分析。
  2. At the same time the principles of triggering pulse to the three - phase thyristors is discussed, and a way using monostable multivibrator to produce the pulses has been given below. the hardware control system based on tms320f240 is designed, which includes sampling circuit, protective circuit, phase - compensated circuit and so on

    對三相晶閘管控制電抗器的觸發脈沖產生原理進行了分析，採用單穩態觸發器實現六相觸發同步；設計了以tms320f240為控制核心的硬體控制平臺，包括采樣電路、保護電路、六相觸發同步等外圍電路。
  3. The development of fieldbus technology made lonworks field bus outstanding in all kinds of fieldbus. this paper simply introduces some kinds of common using fieldbus and the important position and influence of lonworks fieldbus in all kinds of fieldbus, carefully describes the technology core of lonworks technology, puts great emphasis on the introduction of the development and design of public security node of intelligent district which adopts computer, communication and control technology, carefully designs the interfaces of hardware circuits. the public security node of intelligent adopts 8031 single chip as its main processor to complete the application program of user, which mainly collects, process and control all kinds of field signal, and neuron chip 3150 as its slave processor to communicate with other nodes on field network, which works under parrel slave a mode

    現場總線技術的發展使得lonworks技術脫穎而出，本文簡要介紹了常用的幾種現場總線的概況以及lonworks技術在現場總線技術中的地位和影響，對lonworks技術的技術核心：神經元晶元、 lontalk協議、 lonworks收發器、 lonbuilder及nodebuilder進行詳盡的描述；重點介紹了集先進的計算機技術、通信技術、控制技術為一體的智能小區安防節點的開發與研製，對節點硬體電路的各種介面進行了詳盡的設計。本文設計的智能小區安防節點採用單片機8031作為主處理器來完成用戶的應用程序，主要負責對各種現場信號進行採集、處理及控制，工作在并行從a方式下的神經元晶元mc3150作為從處理器，主要完成與現場網路上的各節點及中心控制室之間的通信工作。
  4. As an excellent representative of proletariate jurist, dong bi - wu ' s idea of legal education is very abundant : firstly, the core of legal education is the education to people, secondly, the basis of legal education is the hardware constructions for school and so on, thirdly, the improvement of legal education lies in the progress of legal research

    摘要董必武作為無產階級法學家的傑出代表，其法學教育思想較為豐富，主要表現為：第一，法學教育的核心在於對人的教育；第二，法學教育的基礎在於搞好學校等硬體建設；第三，法學教育的提高在於法學科研的進步。
  5. Through researching the present mainstream ip set - top box hardware system, designed an ip set - top box system which based on the adi blackfin series dsp, and chose the bf561 processor as the system core processor

    本文通過對目前主流ip機頂盒硬體系統的研究，設計了一種基於adiblackfin系列dsp的ip機頂盒方案，並選擇了blackfin系列中的雙核處理器bf561為本系統的核心處理器。
  6. Uc / os is a fully preemptive real - time kernel based on static priority. this paper first analyzed uc / os kernel principle and performance in details and then ported it to broadcom board by writing some hardware - associated code

    文中作者首先詳細分析了uc os內核原理；其次編寫了與硬體相關的代碼，將其在broadcom主板進行了移植；最後分析了其系統性能並對不足之處做出了改進。
  7. Secondly, the paper describe the principle of atm network, and the function of ' sar " ( segmentation and reassembly ) and the format of packet aal5, and introduce the basic idea of ipoa, and the design project and implementing of the control chip. later, the paper introduce the logic function and operational principle of packet buffer control chip and prove the feasibity and correctness of the arithmetic. at last the paper introduce crc - 32 arithmetic based on look up and implement it with hardware

    接著詳細論述了核心路由器atm網路實現的原理，包括「 sar 」 （ segmentationandreassembly ）功能和aal5報文的格式， ipoa基本思想，以及控制晶元的設計方案和實現途徑等。然後又論述報文緩存區控制晶元的工作原理和邏輯功能等，並對演算法的可行性，正確性等進行論證。最後介紹了一種基於查表的crc - 32演算法的原理及其硬體實現。
  8. At last the algorithm of ddmf is achieved by the investigation tool of altera company ? quartus ii and the vhdl language, and its ip core is also achieved which is used not only in the satellite navigation position system, but also in the long pn code dsss system. ddmf investigated in the dissertation gives a good way to design the rapid pn code acquisition in the beidou project, and the technology has the definite theory and practice significance

    此外還應用altera公司的最新的fpga開發工具quartusiiv5 . 1 ，採用了國際標準的硬體描述語言? vhdl語言，對數字差動匹配濾波器和傳統匹配濾波器演算法予以實現，開發了該演算法的軟ip核，可以對所應用的擴頻碼長度， a / d采樣后的數據量化階數，所用擴頻碼等可進行隨意改寫。
  9. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  10. Abstract : this paper discusses the method of adjustable speed driving with bi - directional power transferring converter for motors used in draining and irrigating pumps, a control strategy is proposed to realize super / hyper synchronous speed running with ac - ac converter, and a design for the driver is given based on 16 bit micro - controller

    文摘:針對農用電力排灌站電機調速改造問題，討論了雙饋調速實施方案，提出了採用交交變頻實現超/低同步調速的一種控制方法，給出了以高性能16位單片機為核心的雙饋調速控制系統軟硬體設計
  11. Main characteristics include object - oriented language core, interfaces between vera core and hdl implemented by interface definition and port variables, complex concurrency control implemented by programming construction ( fork / join ) and data structures ( event, mailbox and semaphore, etc ). all these help vera successfully model hardware properties

    主要的特點是：面向對象的語言內核；通過界面定義和埠變量等實現了vera語言內核和硬體描述語言的介面；通過編程結構fork join和數據結構（事件、郵箱和旗語）來實現復雜的并行控制，實現對硬體特點的模擬。
  12. In this paper, using a top - down design scheme, the risc mcu ip core is divided into two parts : data path and control path. all the modules in the two parts are described by verilog hdl, a kind of hardware description language. the simulation and synthesis of the whole work are finished successfully with eda tools

    本文對pic16c6x單片機系統結構、指令系統和系統時序進行了分析，並且在此基礎上對精簡指令集mcuip核進行頂層功能和結構的定義與劃分，建立了一個可行有效的riscmcuip核模型本文將mcuip核劃分為數據通道與控制通道兩部分，採用asic設計中的高層次設計方法，使用硬體描述語言veriloghdl對這兩部分的各功能模塊進行了設計描述；利用多種eda工具對整個系統進行了模擬驗證與綜合。
  13. Based on the advanced embedded computer and network technology along with the embedded operational system such as windowsce, the instruments can gather many functions such as transmitting and measurement, compensatory computation, signal analysis and processing into one instrument. in this paper a portable instrument for vibration measurement with embedded computer system was discussed. based on windowsce real - time operation system the software of this instrument was designed and developed with evc computer language

    本文基於目前流行的便攜式儀器的核心技術? ? windowsce ，設計開發了應用於現場設備振動測量分析的的便攜式測振儀表，針對現場特點和實際要求，對于測振儀的硬體系統進行了規劃設計，並重點對于儀器軟體進行開發，在windowsce平臺下，利用evc語言開發研製了儀器的應用軟體，實現了包括信號採集、分析、顯示、數據存儲和通信功能的軟體系統；並對該軟體進行了計算機模擬調試。
  14. With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit

    在工程設計方法及結構化設計和高層次綜合的研究中，介紹了在深亞微米工藝條件使用的方法和asic設計流程，討論了高層次綜合的核心如何從描述推出電路構成的設計思路，針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法，給出了用vhdl語言進行代碼設計時的規范和風格，在面向soc的驗證策略討論了動態和靜態的驗證技術，提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。
  15. In this paper, after the theory of video coding analyzed and some video compression standard compared, the development, constitution, application and characteristic of h. 264 video compression technique is focused on. and then the design of h. 264 video capturing and coding system based on adi dsp ( adsp - bf561 ) is illustrated, the hardware constitution and the software realization of the real - time video encoder are introduced particularly, and all kinds of techniques to optimize the h. 264 program according to the hardware configuration and compiling characteristics of adsp - bf561 are discussed especially

    本文在分析了視頻編碼的基本原理，並將目前常用的視頻壓縮標準進行了比較的基礎上，重點分析了h . 264視頻壓縮技術的發展、組成、應用及其特點，詳細論述了以adidsp （ adsp - bf561 ）為核心的h . 264視頻採集編碼系統的硬體組成和軟體實現，著重闡述了根據adsp - bf561系統的硬體及編譯系統特點，運用各種方法對h . 264編碼程序代碼進行優化的方法，最終實現了基於adiadsp - bf561的h . 264視頻採集編碼。
  16. Critical circuits in developing this board, such as tht modulation circuit, demodulation circuit, pll and filter, were analyzed in detail. parameters adopted in these circuits were also calculated. based on all that mentioned above, a rf board was implemented and related tests and experiments were successfully done as well

    本文主要對cdpd移動終端數據機的硬體開發中的關鍵部分?高頻部分電路進行了研究，論文在cdpdv1 . 1規范的基礎上，提出了射頻部分電路的實現方案，選擇了合適的核心晶元，並對電路中的調制解調電路、鎖相環、濾波器等關鍵模塊進行了較為詳細的分析，對電路中的有關參數進行了計算。
  17. Aiming at the problems in the field of the government for hydraulic turbine, this thesis applies the technology of programmable controller to the speed control of hydroelectric generators in hydropower station. a digital regulating system based on the fx2 programmable controller for the water - gate and paddle of hydraulic turbine is developed. first, the turbine regulating system is briefly introduced and the mathematics model of the system is derived

    本文針對當前我國水輪機調速器領域技術現狀，將可編程式控制制器技術應用於水電廠發電機組的轉速控制，提出了在應用可編程式控制制器實現導葉控制系統的基礎上，以可編程式控制制器實現導葉、輪葉雙調整控制系統，並參與研製了以fx2可編程式控制制器為核心的水輪機雙調節控制器，樣機的實際運行良好，系統的軟硬體設計得到驗證，結果令人滿意。
  18. After analyzing the noise in the high frequency carrier channel and computing the parameter of channel, we solved the kernel problems of coupling and matched impedance. separate designing the power, power amplification, port, transceiver and other circuits, we fitted together all circuits become the whole lonworks node circuit, and then triumphantly debugged it

    經過對高頻載波通道的干擾特性分析和線路參數的計算，解決了耦合和阻抗匹配等核心問題，並對電源、功放、介面、收發器等部分電路分別設計，最後形成了完整的lonworks節點硬體電路，並調試成功。
  19. Abstract : this article retrospects the development of sequence control system in thermal power plants at home and abroad ， especially introduces the three developmental stages of sequence control system in china over the past 35 years ， i. e. ： 1. starting stage ； 2. the second stage with programmable logic controller ( plc ) as core hardwares ； and 3. the third stage with sequence control systems of main and auxiliary equipment incorporated into the distributed control system ( dcs ) and with field bus control system ( fcs ) got involved. this article also appraises the features of sequence control system composed of different configurations and looks forward to the developmental tendency of this system for the next century

    文摘:回顧國內、外火電廠順序控制系統的發展，特別介紹35a來我國順序控制系統經歷的起步階段、以程序控制器（ plc ）為核心硬體的中期階段和主、輔機順序控制系統融入分散控制系統（ dcs ）階段、現場總線控制系統（ fcs ）介入階段，並對由不同形式組成的順序控制系統的特點進行評價，展望下一世紀該系統的發展趨勢。
  20. Then the paper analyzes control system of hybrid active power filter, the way of harmonic detecting and the principle of control system, digital low pass filter and the generation of pwm, on the base of which the paper designs a new parallel hybrid active power filter which is controlled by tms320lf2407, and detailedly introduces drive circuit of pwm, sampling circuit of current, voltage adjustment and protection circuit, communication circuit, liquid crystal display circuit

    分析了混合型有源濾波器的控制系統、諧波檢測方法及控制原理、數字低通濾波器和pwm信號的產生，在此基礎上設計了一種基於tms320lf2407為控制核心的並聯混合型有源電力濾波器硬體原理圖。並對pwm驅動電路、電流采樣電路、電壓調整、按鍵輸入和保護電路、通信模塊、液晶顯示模塊進行了較詳細的分析說明。
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