硬體邏輯 的英文怎麼說

中文拼音 [yìngtǐluó]
硬體邏輯 英文
hardware logic
  • 硬 : 形容詞1 （堅硬） hard; stiff; tough 2 （剛強; 堅定; 強硬） strong; firm; tough; obstinate 3 （勉...
  • 體 : 體構詞成分。
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 硬體 : hardware
  • 邏輯 : logic
  1. The circuits driving the ccd and processing the video signal are implemented by means of cpld ( complex programmable logic device ) and hdl ( hardvvare description language ). the solution to solve the problem of multi - level logical competitive risks that occur in cpld circuits frequently was provided in details in the thesis

    Ccd的驅動電路和視頻信號處理電路採用cpld （可編程邏輯器件）和hdl （硬體描述語言）實現，文章對cpld電路中容易出現的多級邏輯冒險競爭情況作了專門的敘述和提出相應的解決方法。
  2. At the same time, it also illustrates the superiority of this kind of communication by introducing the profibus field bus. take the transformation of focke packaging machine as an example, the main content is as follows : 1st, to analyze the plc control system of s5 series, and determine the concrete functions that the new plc control system hopes to achieve as well as how to achieve the goal through studying the work program of the original one ; 2nd, to demonstrate the advantage of the field bus in the process of digital alternation by introducing the principle agreement of field bus profibus ; 3rd, to achieve each function of the original control system through using siemens ' s plc control system in the design of hardware and step 7 in the software as well as designing and compiling control system of focke packaging machine ; 4th, to use fm455 for controlling temperature not only can meet the system ’ s severe request for temperature and efficiently avoid many demerits of the temperature control instrument but also can bring convenience for operation and maintenance ; 5th, to use the intouch configuration software to compile monitor and control program can accomplish the goal for real - time surveillance and control of the production line, while setting some parameters can provide a powerful alarming function

    以改造focke包裝機為例，主要內容如下: 1 、通過熟悉原有控制系統的工作流程，分析了原s5系列可編程邏輯控制器的控制系統，確定新的可編程邏輯控制器控制系統需要實現的具體功能以及其實現方法; 2 、在本系統數據交互中，通過介紹profibus現場總線原理協議，論述了現場總線在工業通訊中的優點; 3 、下位機硬體設計上使用西門子可編程邏輯控制器控制系統，軟體平臺採用西門子step7 ，設計和編制了focke包裝機控制軟體，實現了原有控制系統的各項功能; 4 、本系統對溫度要求嚴格，採用溫控儀表控制溫度不能滿足系統要求，而且溫控儀表操作和維護都不方便，因此採用fm455溫度控制模塊進行溫度控制，滿足了系統對溫度的要求，同時又有效地避免了溫控儀表在操作和維護上的缺陷; 5 、在監控系統上，使用intouch組態軟體設計了系統的監控界面，從而實現了對生產線的實時監控，並且可以通過界面設置系統的一些參數，同時提供了較強大的報警功能。
  3. Finaiiy, the paper also has introduced the virtua1 worid of windows rs ; j { ? # - - lase / and how to map the 1ogica1 address to physica1 address in protected mode and the interrupt mechanism of protected mode, then the paper has i11ustrated that it is necessary to write virtua1 device driver ( vxd ) in order to access hardware device from the third leve1

    最後，在介紹了windows的虛擬世界，和在保護模式下如何將邏輯地址映射成物理地址，以及保護模式下的中斷機制的基礎上，闡明了在保護模式下應用程序對硬體設備操作驅動程序的必需的中間橋梁作用。
  4. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  5. By thorough analysis and synthetize this paper made a frame of the system of intelligent instrument and its hardware structure. as followed, this paper depicted design details of intelligent instrument " s hardware, it included the design of interface circuit, data commutations and digital logic of dsp, mcu, internet ' s chip and isp ' s apparatus etc., and have designed schematic map and circuit. so it accomplished the full design of hardware / software of the new type intelligent instrument

    本文具體給出了新型智能儀器硬體結構及實現，描述了智能儀器硬體設計細節，包括數字信號處理器、單片機、 internet接入晶元、可編程數字/模擬器件等在新型智能儀器中的介面電路設計、數據通信設計和數字邏輯設計等，詳細地給出了設計原理圖和電路圖；給出了新型智能儀器的軟體設計細節，從而完成了新型智能儀器完整的軟硬體設計。
  6. Including dsp ' s program under tl " s ccs environment, cpld ' s logic program under max + plus ii environment, system program under visual c + + and so on

    根據本系統硬體邏輯的特點， epf10k10a的邏輯採用邏輯圖輸入的方式，並在max plus11卜模擬結果。
  7. A testbench program is edited to simulate the behavior of the fifo. after the software simulation is accomplished, a real hardware circuit is designed to multiplex two data channels ( 1553b data channel and 1394 data channel ) according to ccsds standard. during the experiment and hardware debugging, the output logic of the fpga is checked up

    設計中，用vhdl語言對高速復接器進行行為級建模，為了驗證這個模型，首先使用軟體進行模擬，通過編寫testbench程序模擬fifo的動作特點，對程序輸入信號進行模擬，在軟體邏輯模擬取得預期結果后，繼續設計硬體電路，設計出的實際電路實現了將來自兩個不同速率的信源數據（ 1394總線數據和1553b總線數據）復接成一路符合ccsds協議的位流業務數據。
  8. In the first part of this paper, different kinds of usual network architecture of parallel - processing multi - processors are studied. based on adsp - 21160 serial digital signal processors from ad company, close - coupled flexible hardware network architecture is selected as the network architecture of the system, because of which the hardware logical architecture of the system can be recomposed on line according to the acquirement of different algorithms

    本文第一部分研究了各種常見的并行處理網路結構，基於ad公司的adsp - 21160系列數字信號處理晶元，選擇緊耦合的柔性硬體結構作為該系統的并行處理結構，使得系統的硬體邏輯結構可以根據演算法的要求在線重組。
  9. After confirming system goal, according to overall design rule, system overall design is to carry out system overall logic structural design and software and hardware design of system ; system function design includes data to get and edit modular, data inquiry and statistics modular, overall estimetion modular, function district estimetion modular and typical cadastral parcel estimetion modular, land optimization deployment modular as well as urban land grade and evaluation modular ; database detailed design includes the design of space database and property database as well as design for the connection of space data and property data ; system application model analysis mainly explains models for intensivism degree, unit comprehensive value, land area potential, land benifit potential as well as typical cadastral parcel estimetion

    系統總體設計是在確定系統目標后，按照總體設計準則，進行系統總體邏輯結構設計及系統的軟硬體配置設計；系統功能設計包括數據獲取及編輯模塊、數據查詢統計模塊、總體評價模塊、功能區評價模塊、樣地評價模塊、土地優化配置模塊以及城鎮土地定級估價模塊等七大模塊的設計；數據庫詳細設計包括空間數據庫、屬性數據庫的設計以及空間數據與屬性數據的連接設計；系統應用模型分析部分主要對于集約度模型、單元綜合分值計算模型、用地面積潛力測算模型、用地效益潛力測算模型以及樣地潛力評價模型做出了分析解釋。
  10. And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths. boundary scan is designed according to ieee1149. 1, and some other instructions such as degug, runbist are provided to support internal fault testing, online debugging and built - in self - test besides the several necessary insructions. internal scan is implemented by partial scan, through this the boundary of logic component and user - cared system registers can be selected to be scanned

    Bist用於測試cpu的微碼rom ，其它ram則利用微碼rom中的微程序進行測試，而微程序的運行則可以順帶覆蓋其它數據通路，從而使高達70 %的硬體得到測試;邊界掃描按ieee1149 . 1標準設計，除必備的幾條邊界掃描指令外，還提供了debug 、 runbist等指令以支持內部故障測試、在線調試及內建自測試;內部掃描採用部分掃描策略，選擇邏輯部件的邊界及用戶關心的系統寄存器進行掃描，從而實現了硬體邏輯劃分，方便了后續的測試碼產生和故障模擬，並為在線調試打下了基礎。
  11. We can take dsp to realize fast encryption algorithm because of its highly parallelism, application - specific hardware logic, and application - specific instructions. pci transaction and dsp processing of data can take place simultaneously for its dual - access ram ( daram ) and host port interface ( hpi ). and, the time taken for interruption almost can be ignored because of deep buffer technology

    Dsp具有高度的并行結構、專用硬體邏輯以及許多專用指令，可以實現快速加密演算法， dsp的雙訪問ram （ daram ）和主機并行介面（ hpi ）可以實現數據pci傳送和dsp處理同時進行，另外採用了深度緩沖技術，使花在主機中斷上的時間幾乎可以忽略不計，所以基於dsp的計算機數據加密卡pcijmc2000獲得了較高的處理速度。
  12. The latest usb2. 0 supports high - speed up to 480mbps. additionally fpga users can conveniently not only design the hardware logic required, but re - program and re - configure

    而現場可編程門陣列器件（ fpga ）是一種可以進行重編程和重配置的晶元，可以方便地設計出所需的硬體邏輯。
  13. In this paper, the decoding flow of ac - 3 is analyzed, moreover, optimization for software and hardware of decoding of audio. acs real - time decoding will be archieved with ip - based embedded risc core by adding special instructions, such as getbits, max, min and adding hardware for the operation of nop and the optimization of the program

    本文分析了ac - 3音頻的解碼流程，並針對音頻解碼進行軟硬體優化，對運用ip技術的嵌入式risc核，通過增加特殊指令getbits ， max和min ，以及增加硬體邏輯完成nop操作和解碼程序的優化，實現了ac3音頻的6聲道的實時解碼。
  14. In the process of design, simulation is achieved by active hdl, and synthesis is achived by symplify, and finally the chip is downloaded in quickpro

    在硬體邏輯設計過程中，藉助activehdl進行硬體邏輯前後模擬，使用symplify工具進行邏輯綜合，最終在quickworks下生成fpga晶元。
  15. The research of this task comes from key projects in scientific research of the tenth " five - year plan " ( ( the technology of color spray - paint graph plotter for military use ) ). a further study has been made of pci2. 2 bus protocol, and a theoretical summarization of the protocol needed in the design of pci system is presented from the viewpoint of engineering application. on the basis of a good knowledge of pci bus protocol, this paper suggests a new method of data transmission based on pci on high - speed spray - paint graph plotter, and then designs hardware logic according to the methed, puts pcb board into practice. finally, the wdm drive progam of the hardware device is designed

    論文深入研究了pci2 . 2總線協議，並在工程角度上對pci總線協議中項目相關的協議的進行了理論總結。本論文在深刻理解pci總線協議的基礎上，提出了高速大幅面新一代彩色噴墨繪圖機上基於pci數據傳輸技術的一種新穎的解決方案，並基於這種方案設計出硬體邏輯，實現pcb板，最後設計出該硬體設備的wdm驅動程序。本文在設計硬體邏輯時，擺脫了傳統設計思路，應用了一種新穎的設計方法，應用了quicklogic公司的嵌入式可編程介面晶元q15030來完成介面晶元設計。
  16. Based on the above study, this topic has realized simulator run environment. after the start - up of simulation running environment with loaded object code, each simulation component shall harmonious run under the logic control of application software, so as to support the software commission and test verification

    支持從構件庫中選取需要的模擬構件，以可視化圖形編輯的方式構造模擬目標硬體環境;加載目標碼的模擬運行環境啟動后，各模擬構件能在應用軟體邏輯的控制下協調運行，從而支持嵌入式系統軟體的調試和測試驗證。
  17. All 1553b protocol handlings are realized by soc hardware logic, high reliability can be assured

    所有協議均由硬體邏輯自動完成，可靠性高
  18. We also can replace the logic of the hardware with the logic of the program in the control of the electric machine

    在電機的控制中，也可盡量用程序邏輯代替硬體邏輯，並可發揮軟體功能。
  19. The maximum power of systems, the maximum logic gates used for hardware and the maximum length of the software code, etc. the functionality of system can be encapsulated in a class using object - oriented technique

    其中，用例圖用來描述系統設計中的設計需求和約束條件，約束條件主要包括最大功率、硬體邏輯門的最大使用數和軟體代碼的最大長度等。
  20. In the paper the principles and high - speed interface are analized, the requirements of the design are given. system realizing ways are discussed and analysed. design and realization of the interface system and controllers are analysed and demonstrated respectively in detail

    論文進行了原理分析，給出高速介面系統的總體方案，然後分別闡述了嵌入式介面系統的實現和控制器的研究實現，前者包括該usb介面的比較選擇，以及它的固件與驅動程序設計;在後者中，利用一百萬門的fpga實現了硬體邏輯，並實現了fifo 、 sdram控制器。
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