空寄存器 的英文怎麼說

中文拼音 [kōngjìcúnqì]
空寄存器 英文
dummy register
  • 空 : 空Ⅰ形容詞（不包含什麼; 裏面沒有東西或沒有內容; 不切實際的） empty; hollow; void Ⅱ名詞1 （天空） s...
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  1. Applying two perpendicular polarized light states and a no - light state to express information, this new theoretical system covers : a ) whole architecture constructed from light processing, light transmission, electric control and photoelectric input and output ; b ) various computing units mainly consist of liquid crystal element and polarimeter ; c ) light bus mainly consists of interlinkage optic valves ; d ) ternary memory formed from semiconductor memory ; e ) register formed from optic fiber ring ; and i ) huge - numeral management based on the new concept of calculating path and calculating channel

    這個理論包括：光處理、光傳送、電控制、綜合輸入輸出的總體結構；以液晶元件和偏振器為主的各類運算器結構；以互連光閥為主的光空間總線；以半導體存儲器為主的三值數據存儲器結構；以光纖環為主的寄存器結構；以算位、算道新概念為基礎的巨位數管理方案等。
  2. Memory management is simpler when all processes use the same segment register values when they share same set of linear addresses

    當所有的進程都使用相同的段寄存器值時（當它們共享相同的線性地址空間時） ，內存管理更為簡單。
  3. For the real time performance need of the low speed speech compress algorithm and the asic implement of the transfer process between programs, the design is put forward in the paper, in which state registers control the cross access between operator and memory, register windows are used for the parameters transfer, and the technique of hardware controlling is used to avoid pipeline conflict, so that the main problems of the transfer process in tr600 are solved effectively

    摘要針對低速率語音壓縮演算法對處理器系統實時處理復雜運算的性能要求，就程序調用過程的asic實現問題進行了對比與分析，進而提出了用層次狀態寄存器控制存取運算元對存儲體交叉訪問的方法，並結合運用寄存器窗口傳遞參數的功能，以及利用空指令硬布線處理流水線沖突的方法，有效地解決了tr600晶元中調用過程存在的主要問題。
  4. A processor is composed of two functional units ? a control unit and an arithmetic / logic unit ? and a set of special workspaces called registers

    處理器由兩個功能部件（控制部件和算術邏輯部件）與一組稱為寄存器的特殊工作空間組成。
  5. Each word in turn enters the top register and is then “ pushed down ” the column from register to register to make room for the next words to arrive

    每個字依次從這個棧頂寄存器進入，然後逐個下壓，即從上一個寄存器移到下一個寄存器，空出棧頂寄存器以接納新的字。
  6. In the part of voice encryption, spatiotemporal chaotic system ( ocoml model ) and lfsr are used to generate multidimensional pseudo - random sequence. this sequence has a longer period, better randomicity, passing the verification of fips 140 - 2 security requirements. using the key stream generated by it to encrypt the voice gets a better security

    在語音加密方面，本文利用時空混沌系統（單向耦合映象格子模型）與線性移位寄存器產生了高維的偽隨機序列，該序列周期很長，具有更強的隨機性，通過了fips140 - 2的安全性能驗證，利用其作為密鑰流對語音信號進行加密，獲得了更高的保密性。
  7. The thread context includes all the information the thread needs to seamlessly resume execution, including the thread s set of cpu registers and stack, in the address space of the thread s host process

    線程上下文包括為使線程在線程的宿主進程地址空間中無縫地繼續執行所需的所有信息，包括線程的cpu寄存器組和堆棧。
  8. Known well vxibus criterion, the structure of configure register and vxi address mapped theory. known well the structure and work theory of high speed synchro data acquisition device

    熟悉vxi寄存器基器件的配置寄存器結構， vxi地址空間映射原理；熟悉高速同步採集卡的總體結構和工作原理。
  9. The thread context includes the thread s set of machine registers, the kernel stack, a thread environment block, and a user stack in the address space of the thread s process

    線程上下文在線程進程的地址空間內包括線程的一組機器寄存器、核心（ kernel ）堆棧、線程環境塊和用戶堆棧。
  10. Intel architectures use a segmented address space in which memory is broken up into 64kb segments, and a segment register always points to the base of the segment that is currently being addressed

    Intel架構使用了分段的地址空間，其中內存被劃分成64kb的段，有一個段寄存器總是指向當前正在尋址的段的基址。
  11. Intrinsic functions that do not allocate stack space and do not call other functions can use other volatile registers to pass additional register arguments because there is a tight binding between the compiler and the intrinsic function implementation

    由於編譯器與內部函數實現之間存在緊密的綁定，因此不分配堆棧空間且不調用其他函數的內部函數可以使用其他易失寄存器來傳遞附加的寄存器參數。
  12. A design method based on the decomposition and multiplexing technique of complex instruction, combined the decoding arithmetic of instruction and a step counter together, sub - step realization method of multiclocks is proposed. the similarities and differences of architecture between fsm and multi - ? ocks are discussed from two aspects, timing and state space

    提出了執行周期復用的指令分解、指令寄存器與步長計數器聯合譯碼，以及多時鐘同步的控制流設計方法；進而從時間和狀態空間兩個角度深入討論了控制流設計中狀態機和多時鐘兩種常見體系結構的異同。
  13. While each process can have its own address space, all processes have to share the cpu registers

    盡管每個進程可以擁有屬于自己的地址空間，但所有進程必須共享cpu寄存器。
  14. It also frees one more register, ebp on the intel 386 or later for storing frequently used variables and sub - expressions

    它還可以使一個或多個寄存器（ intel 386或更高版本中的ebp ）空閑出來，將其用於存儲頻繁使用的變量和子表達式。
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