線串 的英文怎麼說

中文拼音 [xiànchuàn]
線串 英文
thread
  • 線 : 名詞1 （用絲、棉、金屬等製成的細長的東西） thread; string; wire 2 [數學] （一個點任意移動所構成的...
  1. As a new interface caters for rapid development of computer peripheral equipment, universal serial bus ( for short usb ) dispels astriction of communication through traditional serial port and parallel port. it is very suitable for real time image data transmission, which requires high speed. this theme describes two - circuit systems, which utilize usb interface to data from a digital image sensor to pc

    為了迎合計算機上設的快速發展以及消除計算機外設通過串、並口的通訊的局限性，出現了新的計算機外設介面usb （通用串列總線） ，這種新型介面對于實時的視頻傳輸很適用，本文設計了兩套電腦眼基於ez - usb2131q的usb介面系統。
  2. Engine parameter acquisition display system is an important member of helicopter seat room display system, and is made of engine parameter acquisition unit ( epu ) and engine parameter display ( epd ). epu is joined with engine electronic controller, fuel manage system, engine and accumulator by the wire. it acquire the parameter of engine, for example, analog signals, frequency signals and discrete signals, etc. then data processing, compare data and operation is executed

    發動機參數採集器通過硬連線與發動機電子控制器、燃油管理系統、發動機及蓄電池相連，採集模擬量、頻率量及離散量信號等參數，並對採集的數據進行運算、比較與處理，最後通過標準rs ? 422a串口和發動機參數顯示器及其它設備進行通訊。
  3. This paper studies two tcsc study systems, a tcsc system based on ieee first benchmark model ( ieee fbm ) and a simplified yi - feng 500kv tcsc study system, with ssr eigenvalue analysis in the platform of psaspfmsst. it proves the funtion of tcsc to mitigate subsynchronous resonance ( ssr ). it also analyzes the influence of thyristor triggering algorithm of tcsc on ssr mitigation

    本文在psasp小干擾線性化平臺psasp msst上，對基於ieeefirstbenchmarkmodel （ ieeefbm ）的tcsc系統及簡化的伊馮500kv可控串補研究系統，進行了ssr小干擾穩定分析，驗證了tcsc對次同步諧振（ ssr ）的抑制作用，並研究了觸發演算法對tcsc抑制ssr能力的影響。
  4. Author has analyzed many schemes such as electric cable reading system, telephone line reading system, infrared ray reading system, hertzian waves reading system, 1c card reading system. we design a new scheme of combing infrared communication and serial communication based on client request and local condition

    作者在分析了電力線抄表、電話線抄表、紅外線抄表、無線射頻抄表、 ic卡抄表等一系列抄表方案的優劣后，根據客戶要求和現場實際，提出了將無線紅外通信和有線串列通信相結合的抄表方案。
  5. So, in this paper, a new feeding method is proposed. it is a combination of aperture coupling from a slotted waveguide and coplanar feeding using series - fed microstrip line

    因此，在本文中提出一種對微帶貼片天線陣饋電的新方法，它是由波導縫隙的口徑耦合饋電和微帶線串饋的平面饋電共同完成的。
  6. During the design of vxi - bus serial controller module, the functions of vxi - bus including time - sequence for vxi interface, resource management, interrupt process, bus arbitration, are accomplished. to advance the performance and stability, the fpga technic is used to implement the kerneled code including serial bus time - sequence switching to vxi interface time - sequence, the uart, the parameterized baud generator and “ pipeling frame ”. the handle type of data transfer bus for vxi - bus is researched thoroughly, and the format of serial data transfer is designed

    在vxi總線串列控制器設計中，實現了vxi總線控制器的基本功能，包括vxi總線介面時序、總線仲裁、超時處理等;同時利用先進的fpga技術實現了串列總線時序向vxi總線時序的轉換、通用異步收發器（ uart ） 、參數化波特率發生器、流水線結構等功能模塊;在設計中還深入研究了vxi總線數據傳輸的各種操作類型，制定了串列數據傳輸的編碼格式。
  7. Shielding area optimization under the solution of interconnect crosstalk

    減小互連線串擾的屏蔽線面積優化
  8. First bounding string is not continuous. second bounding string is not continuous. string to trim is not continuous

    如果定義的線串之一不能形成一條曲線或邊緣的連續集，則會出現以下出錯消息。
  9. First bounding string is not planar. second bounding string is not planar. string to trim is not planar

    如果矢量方向選擇步驟下的「曲線平面」選項被選來定義修剪視圖，且相應的線串不是平面的，則會出現以下出錯消息。
  10. First bounding string plane and string to trim plane is not equal. second bounding string plane and string to trim plane is not equal

    如果矢量方向選擇步驟下的「曲線平面」選項被選中，且由線串定義的平面不是等同的，則會出現以下出錯消息。
  11. Can only trim single curve at this time. can only trim single first bounding curve at this time. can only trim single second bounding curve at this time

    這些出錯消息反映了草圖生成器中的當前限制，即如果選擇了非關聯的選項，那麼一次只能修剪一條曲線。這包括邊界曲線和要修剪曲線的線串。
  12. As the technology advances into deep sub - micron era, crosstalk reduction is of paramount importance for signal integrity. simultaneous shield insertion and net ordering sino has been shown to be effective to reduce both capacitive and inductive couplings

    隨著集成電路工藝發展到深亞微米技術，互連線串擾問題變得相當重要，它與互連線時延問題成為了決定電路性能的主要因素。
  13. Pulse corona discharge characteristics of the line - to - plate reactor with series and parallel corona wire

    電暈線串並聯的脈沖電暈放電特性
  14. The periphery electric circuit of adc was designed, including 3 - wire serial port configuration circuit, analog input electric circuit, clock input circuit and power

    對adc的外圍電路進行設計，包括三線串口配置電路、模擬輸入電路、時鐘輸入電路和電源電路。
  15. The adc chip chosen is at84ad001 which is produced by atmel corporation, and the chip is setted on its 3 - wire serial interface to work in interlaced mode, and this can achieve the sampling rate the system needs

    採用的adc晶元是atmel公司生產的at84ad001 ，通過對其三線串列介面進行設置，使其工作在交錯模式下，達到系統所需的采樣率。
  16. Multibus serial priority

    多總線串列優先序
  17. Based on study of the vme, vxi, usb specification, serial communication and controller technic with comprehensive compaing the popular serial bus, we select the universal serial bus as the main communication interface between computer and this controller. then the theory and implement method of vxi - bus serial controller module are specially analyzed

    本文在對vme 、 vxi 、 usb總線規范、串列通訊技術和控制器技術深入理解，並全面比較當前流行的計算機串列總線技術的基礎上，選擇了usb2 . 0總線作為控制器與主控計算機通訊的主要介面，然後對vxi總線串列控制器的基本原理和實現方法作了深入細致的研究。
  18. Serial infrared port

    紅外線串列介面
  19. In the early 1980 ' s, philips semiconductors developed a simple bi - directional 2 - wire bus for efficient inter - ic control. this bus is called the inter - ic or i2c - bus

    早在1980 ' s ，飛利浦公司提出了用於晶元間控制的雙向兩線串列i ~ 2c總線， i ~ 2c也可寫作iic指的是inter - ic的首字母縮寫。
  20. The project is developed to realize the high - speed and high - performance of the auto - test system of vxi - bus. as the kernel of vxi - bus auto - test system, the module is not only the commander of vxi - bus auto - test system, but also the resource managerment of the system, vxi - bus serial controller module determined the performance and stability of the system significantly

    本課題是為組建高速、高性能vxi總線自動測試系統而提出的， vxi總線串列控制器作為vxi總線自動測試系統的核心模塊，它不僅是vxi系統的命令者也是系統的資源管理者，因此，它的性能和穩定性直接決定了整個系統的性能和穩定性。
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