編輯控制字元 的英文怎麼說

中文拼音 [biānkòngzhìyuán]
編輯控制字元 英文
edit control character
  • : Ⅰ動詞1 (編織) weave; plait; braid 2 (組織; 排列) make a list; arrange in a list; organize; gr...
  • : Ⅰ動詞(編輯; 輯錄) collect; compile; edit Ⅱ名詞(整套書籍、資料的各個部分) part; volume; division
  • : 動詞1 (告發;控告) accuse; charge 2 (控制) control; dominate 3 (使容器口兒朝下 讓裏面的液體慢...
  • : Ⅰ動詞1 (製造) make; manufacture 2 (擬訂; 規定) draw up; establish 3 (用強力約束; 限定; 管束...
  • : Ⅰ名詞1 (文字) character; word 2 (字音) pronunciation 3 (字體) form of a written or printed ...
  • 編輯 : 1. (加工整理) edit; compile 2. (做編輯工作的人) editor; compiler
  • 控制 : control; dominate; regulate; govern; manage; check; cybernate; manipulate; encraty; rule; rein; c...
  1. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a碼模塊、 i ~ 2c總線模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏;視頻數據幀存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號; d a碼模塊在視頻處理模塊的下把數視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線模塊模擬i ~ 2c總線時序實現對系統中、解碼晶的初始化。
  2. In sdf / cics, a character used in the field definition function of the map editor to indicate that two adjacent fields should be separated according to the number of trailing blank characters in the line

    在客戶信息系統屏幕定義程序( sdf / cics )中,用於映象程序的欄位定義功能中的一種,它根據一行中尾隨的空格個數來分隔兩個相鄰欄位。
  3. To realize nolinear excitation controller, it must be improved that the disposal speed of nolinear excitation control " s signal. with analyzing and comparing all kinds of microcomputer excitation controller, a new microcomputer excitation control scheme is offered that is based on dsp controller while the cpld chip is utilized for realizing the function of pulse trigger. it is described in detail that the method of realizing controllable silicon digital logic by verilog hardware describe language and the designed digital pulse trigger " s veracity was validated by digital simulation

    論文進一步針對非線性勵磁要求信號處理速度高、信息量大的特點,在對目前微機勵磁器分析基礎上,提出採用dsp器晶作為核心處理器的微機勵磁器的解決方案,運用復雜可程邏器件cpld晶實現可硅同步脈沖觸發單,並簡要說明了verilog硬體描述語言和數脈沖形成邏的方法,通過電路數模擬對所設計的數觸發單進行了驗證。
  4. On windows systems, if you press the tab key in a multiline edit control, a tab is inserted into the text

    在windows系統中,如果在多行項中按tab鍵,會向文件中插入一個跳位
  5. Then, edit strings and adjust the location and size of controls to accommodate the strings for the target culture

    然後,串並調整項的位置和大小,以適應目標區域性的串。
  6. A concrete control that supports editing a hidden text string. generally used to edit confidential information such as a password

    一個支持隱藏文本串的項。通常用於如密碼這樣的私密信息。
  7. A design ot portable digital oscillograph based on dsp is presented. a integrated prototype is composed of high speed data processing module by which signal is digitalized, data processing unit whose core is dsp, general controller as which cpld is used and terminal facility - - lcd

    通過高速數據採集模塊將信號數化,以高性能數信號處理器tms320vc5402為核心構成數據處理單,採用高密度的可程邏器件epf6016a設計儀器的系統,使用液晶顯示器做為終端顯示設備,構成一個完整的示波表樣機。
  8. Both are used to separate the responsibility for rendering pages from the model and controller. both accept objects passed into them as an input argument, both allow inserting string values within code " expressions ", and allow direct use of java code to perform loops, declare variable, or perform logical flows " scriptlets ". both are good ways of representing the structure of a generated object web page, java class, or file while supporting customization of the details

    Jet與jsp非常類似:二者使用相同的語法,實際上在後臺都被譯成java程序;二者都用來將呈現頁面與模型和器分離開來;二者都可以接受輸入的對象作為參數,都可以在代碼中插入串值(表達式) ,可以直接使用java代碼執行循環、聲明變量或執行邏流程式(腳本) ;二者都可以很好地表示所生成對象的結構, ( web頁面、 java類或文件) ,而且可以支持用戶的詳細定製。
  9. In order to resolve the contradiction between real - time and arithmetic complex in the television tracking capture system, the paper designs the real - time target track processing system which is constructed by the high performance dsp chipset tms320c6416 as the core digital processor, the huge reprogrammable logic chipset cpld as the system logic control and the field reprogrammable array fpga as the image preprocessing chipset to sampled video digital image

    摘要為解決電視捕獲跟蹤瞄準系統中系統的實時性與演算法復雜性之間的矛盾,設計了以高性能的dsp晶tms320c6416為核心處理器,結合大規模可程邏器件cpld進行邏以及現場可程門陣列fpga對採集的視頻數圖像做預處理的實時目標識別跟蹤處理平臺。
  10. The real - time target track processing system is designed which is constructed by the high performance dsp chipset tms320c6416 as the core digital processor, the huge reprogrammable logic chipset cpld as the system logic control and the field reprogrammable array fpga as the image preprocessing chipset to sampled video digital image

    為了解決演算法復雜性及滿足工程實時性,設計了以高性能的dsp晶tms320c6416為核心處理器,結合大規模可程邏器件cpld進行邏以及現場可程門陣列fpga對採集的視頻數圖像做預處理的實時目標識別跟蹤處理平臺。
  11. Method, initializes that instance with the current expression string set for the control property, and returns the instance to the visual designer

    方法中創建派生器表的一個實例,使用為項屬性設置的當前表達式串初始化該實例,然後將該實例返回給可視化設計器。
  12. Method, initializes that instance with the current expression string set for the control property, and then returns the instance to the visual designer

    方法中創建派生器表的一個實例,使用為項屬性設置的當前表達式串初始化該實例,然後將該實例返回給可視化設計器。
  13. Its driver control logic was realized by means of digital integrated circuit in which the pld chips utilized as the carrier. the vhdl, which is the ieee standard design language of integrated circuit, is used as the behavior description language. the compilation, synthesis, simulation and programming are fulfilled in the maxplusii

    設計的重點是驅動板,其驅動以pld晶為載體通過數集成電路方式實現,的功能設計是用ieee標準的集成電路設計語言vhdl作為行為描述語言,在maxplus武漢科技大學碩士學位論文環境中進行譯、綜合、模擬和晶程。
  14. Encoding string - typed properties in editing controls

    項中對串類型的屬性進行
  15. In this solution, the embedded soft cpu ip core is used as the kernel digital module with its periphery controllers based on residual les. in addition, analog channel circuit is added to form an integrated dso system. this dissertation focuses on framework construction, gui design, memory management, message fifo management, other hardware drivers and describes design and implementation of software simulation system written in advanced languages

    在這種方案中,使用了在fpga中嵌入cpu軟核作為核心,並用fpga晶中剩餘的其他可程邏資源構成該嵌入式系統的外圍器件,形成數示波表的數核心模塊,並配以模擬通道部分電路,組成了一個完整的數示波表。
  16. A design of the feeder terminal unit based on dsp is presented. an integrated prototype is composed of a 6 - channel voltage collector, a 6 - channnel current collector, a 16 - channel state collection a 2 - channel impulse collector, a data processing unit whose core is dsp, a general controller in which cpld is used

    系統通過6路電流採集、 6路電壓採集、 16路的狀態採集以及2路的脈沖採集獲取相應的數據信息;以高性能數信號處理器tms320vc5402為核心構成數據處理單;以高性價比的可程邏器件epm7128為全局器;同時數據可以通過鍵盤和數碼管進行現場
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