路由緩沖器 的英文怎麼說
中文拼音 [lùyóuhuǎnchōngqì]
路由緩沖器
英文
routing buffer-
Through the implementing of kernel level file and cache mechanism at the client side, this newly proposed distributed network file system provides seamless network file access and reduces the performance decline caused by network transmission. utilizing the concept of logic block server, it provides the reliable data block storage and implements redundant storage capacity. utilizing the concept of the index server, it provide s the cost of the greatly for server and network during data access process and realizes the computing with balancing capacity
在客戶端通過實現內核級文件的調用和緩沖機制，實現了文件的無縫網路存取，並減少由於網路傳輸帶來的性能下降的影響；利用邏輯塊服務器實現邏輯塊的冗餘存取，實現數據塊的安全存放；利用索引服務器進行負載均衡計算，實現資料存取的較低網路和服務器開銷；利用索引服務器實現服務器組的零管理，使該系統具有高效性、穩定性和可伸縮性。Main technic of giss webgiso thus function modules architecture and network topological structure are confirmed webgis system implements the basic function of electronical map, such as map zoonu pan, and the abundant query of geograph and database by using maplnfo mapxtreme for java as map server and jsp., java technico this system also can implement the routing of linesx analysing of buffer and so on0 this paper advances storage model of roads and pipelines topology data, efficiently solves the maintenace problem of network topology data of webgis and implements the shortest path algorathm based on webgis by improving it0 the system has better opening by suppling database interface of map ? the system has perfect on - line help and user forum and favorable interfaces and implementation of this system makes fundament for the further research of webgiso
本系統利用mapinfomapxtremeforjava作為地圖服務器，採用jsp和java技術，實現了基於webgis的電子地圖的縮放、漫遊等基本功能，並具有豐富的圖文定位查詢功能；實現線路路由、緩沖區分析等輔助決策功能；構建了道路管線網路拓撲數據的存儲模型，有效地解決了基於webgis的網路拓撲數據的維護問題；對dijkstra演算法進行了一些改進，實現了基於webgis的最短路徑演算法；本系統提供了電子地圖數據庫介面，使本系統具有很好的開放性和通用性； webgis系統軟體具有完善的在線幫助和用戶交流論壇，人機界面友好。It eliminates the need for agent blocks to have specific knowledge of ram array behind it. it takes care of protocols and latencies in an effort to simplify memory access by the agent blocks. agent blocks " see " a single linear frame buffer, all paging and bank swapping is handled by the and is transparent to the agent blocks
在嵌入式系統晶元中高速存儲器介面控制電路是系統必不可少的重要組成部分，由於有了存儲器介面的存在，使得系統內部客戶模塊不必專門了解存儲器本身的復雜特性，而只需關心傳輸協議和一些定義的遲滯參數，在客戶看來存儲器僅僅是一個線性的幀緩沖器，所有的換頁、區段切換都交由介面電路來處理，從而大大簡化了客戶對存儲器操作的復雜度。This card largely depends on three integrate chips to fulfill its function : 1 ) nic control main chip, corresponding the mac sublayer of ethernet, to realize csma / cd media access protocol, manage the sending and receiving buffers integrated on the chip and provide motherboard pci interface. 2 ) serdes ( serializing and deserializing ) chip, corresponding pcs and pma sublayers in ethernet, mainly to complete 8b / 10b coding and convert 10 bits parallel data to serial data, and convert them again at the receiving end. 3 ) fibre transceiver unit, completing light - electrical conversion of seri
該網卡主要由3塊集成的晶元完成其功能，分別是i ）網路控制主晶元，對應于以太網的mac子層，主要完成csmaicd介質訪問協議，管理片上集成的發送和接收緩沖區，並提供和主板p0總線的介面： b ） s rd s （串列解串列化器）晶元，對應于以太同的pcs和pma子層，主要完成sb lob編碼並將10位并行的數據轉換為串列數據，在接收端完成相反的功能：涌）光纖收發器，完成串列數據的光電轉換功能。However these converters become more complicate. phase - shift zvs technique has been used in bidirectional dc / dc converters since it can realize zvs for all switches without auxiliary switches. however when the amplitude of input voltage is not matched with that of output voltage, the current stresses and rms currents of the converters become higher, in addition the converters can not achieve zvs under light - load condition
諧振、準諧振或多諧振技術方案，變換器的電壓電流應力較高，變頻控制增加了濾波器設計的難度；能量緩沖吸收電路或有源鉗位電路方案，由於需要增加多個額外輔助元件，增加了變換器的復雜性；全橋相移技術方案，由於主電路無需增加額外元件，只需利用相移控制，即可實現軟開關，因此引起關注。The traditional technique for managing router queue in internet usually adopts first in first out ( fifo ) scheduling and " drop tail " queue management algorithms, which have no provision for the detection of incipient congestion when the queue is full
Internet中傳統的路由器通常採用先來先服務的調度演算法以及「棄尾」緩沖管理方法，在指示和控制擁塞方面不提供任何顯式的支持。Router delays : packets are re - assembled when received by routers and buffered in memory until they can be transmitted on the next hop
路由延遲：包被路由器接收后重新組裝並保存在緩沖區中直到他們發送到下一站。分享友人