邏輯存儲器 的英文怎麼說

中文拼音 [luócúnchǔqì]
邏輯存儲器 英文
logic in memory
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 儲 : Ⅰ動詞（儲藏; 存放） store up; save; keep [have] in reserve Ⅱ名詞1. （繼承人） heir 2. （姓氏） a surname
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 邏輯 : logic
  • 存儲 : [計算機] memorizing; storage; memory; store
  1. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  2. The chip simulation network laboratory system this paper disguessed is a distribute network simulation system based on lan. the system ' s architecture is a c / s of three lays. the front platform are the chip simulation network system application program terminer ; the middle lay is a dcom server, it ' s duty is to deal with the communication and data transmission between the terminer and then database server, and to execute the logical operation. the application program just connect with the middle lay and get data from it, the connection and operation with database server will be managed by the dcom server. the duty of database server is to access and backup the final data

    具體是由位於網路各個終端的晶元模擬網路實驗系統應用程序為前臺；中間層為dcom應用程序服務器，負責處理前臺應用程序與后臺數據庫的通信和數據傳輸，並執行業務邏輯，前臺應用程序只需要與應用程序服務器建立連接，在中間層操作數據即可，與后臺數據庫的連接和操作由應用程序服務器來統一管理操作。后臺數據庫只負責數據的存取操作。本論文實施的晶元模擬網路實驗系統模擬了主要的邏輯電路器件， 8088cpu ，存儲器，寄存器，數據總線，地址總線和控制總線，及其它相關晶元。
  3. However, since memory circuit is very large and dense and the growing of its size is amazing, it is unpractical to extract the logic parameter directly with simulation tools

    然而，由於存儲器單元密集和電路龐大的特點，並且存儲器的增大極為迅速，使得用模擬工具直接提取邏輯參數並不現實，存儲器的簡化迫在眉睫。
  4. By greatly enhancing digital machines ' ability to crunch numbers, execute logical operations and store data, this unprecedented manufacturing success has enabled revolutionary changes in our day - to - day lives while spawning one of the planet ' s largest and most influential industries

    數位機器處理數字、邏輯運算，以及儲存資料的能力大幅增加后，這項前所未有在製程上的成就，對我們的日常生活造成了革命性的改變，也孕育出世界上最大、最有影響力的工業。
  5. The high - speed data buffer is designed by adopting cpld and general high - speed static memory. 5

    採用cpld控制邏輯外加通用靜態高速存儲器來實現採集后數據的高速緩存。
  6. A portion of the buffer cycle in which the logic or a rithmetic unit must cease operation or neither will be able to communicate with the memory unit

    緩沖存儲器周期的一部分，在這期間，邏輯與算術運算器必須中止操作或不能與存儲器傳輸信息。
  7. 4. complete the design of system ’ s logic function with fpga. the sdram ’ s controller and ping - pong operation is studied, and the data ’ s continuous storage is also realized. 5

    4 .設計實現系統的fpga邏輯部分，並研究了高速大容量sdram控制器和進行乒乓存儲操作邏輯時序，實現了數據流的連續傳輸。
  8. Then we explicate the hardware design in details, including implementing ad convert, extending multiple serial communications and external memory, and using cpld do some logic controls. thereby we implement abundance simulation interface, flexible digital interface and serial communication interface. at last we describe the software design, including software design of cpld basing on vhdl and software design of dsp

    本文首先介紹飛行模擬訓練系統的主要組成；接著說明飛控計算機整體系統方案的設計；然後詳細說明飛控計算機硬體平臺的設計，包括ad轉換、多串口通信、外部存儲器的擴展以及採用可編程邏輯器件cpld實現電路的邏輯控制等幾部分，體現了系統豐富的模擬介面、方便靈活的數字介面和串列通信介面；最後是軟體部分的編程，包括cpld部分的硬體描述語言程序設計，和dsp部分相關的程序設計。
  9. One supports branch instructions. the other does n ' t. and they both lack features common to general purpose microprocessors such as logic instructions and indirect memory access

    Gcx支持兩類後端，一類不支持轉移指令，另一類支持轉移指令，但兩者都缺乏一般微處理所具有的例如邏輯指令、存儲器間接訪問等特性。
  10. In the hardware design, the analog circuit, high - speed a / d convertor, storage control logic and vxibus interface are discussed. the results of the simulation and analysis of the circuits are given

    在模塊的硬體電路設計部分中，著重對信號調理電路、高速a / d轉換器、高速存儲邏輯控制以及vxi總線介面等內容進行了討論，給出了具體的電路設計和關鍵器件的說明，並對部分模擬電路和數字電路進行了模擬分析。
  11. This program memory addressing logic is handled by a register referred to as a program counter.

    程序存儲器的導址邏輯是由寄存器來實現的，這個寄存器叫程序計數器。
  12. Abstract : the basic theory and function of cd retrieval and systemic constitution of multimedia searching databases cd co - developed by the author and tsinghua university is stated. the system consists of load, databases, html browser, editing and print. the system almost holds out multimedia format and has powerful retrieving function, it not only involves all methods of manual retrieval, but also carries out logic and mixed retrievals. the process in fact is one during which data are matched. the result shows : cd databases make retrieving popularized, simplified and have vast foreground in storage

    文摘:介紹了作者與清華大學合作開發的多媒體全文檢索數據庫光盤的系統組成與光盤的檢索功能及原理.系統由標引系統、資料建庫系統、超文本瀏覽器、編輯出版系統組成.該系統幾乎支持所有的多媒體格式，具有強大的檢索功能，不僅囊括了手工檢索的全部方法，還可進行模糊邏輯檢索和任意混合檢索.其檢索過程實際是一個數據匹配的過程.實踐證明，光盤數據庫使檢索大眾化、簡單化和普及化，在信息儲存方面前景廣闊
  13. Cmos image sensor consists of image array logic registers, memory, timer pulse generator and converter

    Cmos圖像傳感器包括圖像陣列邏輯寄存器、存儲器、定時脈沖發生器和轉換器在內的全部系統。
  14. 2 castillo x, mcconnel s r, siewiorek d p. derivation and calibration of a transient error reliability model. ieee trans

    因此，設計vlsi電路級的差錯檢測和差錯校正邏輯以防護存儲器和邏輯電路是很有必要的。
  15. You can now use windows backup with a wide variety of storage devices, including tape drives, removable disks, recordable cds, logical drives, and network drives

    現在可以將windows備份和各種存儲設備一同使用，包括磁帶驅動器、可移動磁盤、刻錄光盤、邏輯驅動器和網路驅動器。
  16. Shared virtual memory system builds one svm layer over physically distributed memory to form one logically uniform shared virtual space

    虛擬共享存儲系統（ svm ）用軟體的方式在物理分佈的存儲器上實現了一個邏輯上統一的虛擬共享存儲空間。
  17. The performance of logical operations and calculations on data, including the temporary retention of data in processor storage while it is being operated upon

    對數據進行邏輯操作或計算的實現過程或方法，包括數據運算時如何在處理機存儲器中暫時存放中間結果。
  18. In the description of circuit design, the emphasis is paid the following hardware modules : ad / da inverter, dsp module, external program / data memory, cpld control logic, serial communication module, power module, and so on. problems and the corresponding solutions found in the design and debug stage are discussed, too. finally, the low - level software driver design is presented in detail, including system booting, initialization of dsp registers, cpld logic and timing control, drivers for asynchronous communication fifo, and drivers for ad converter

    在電路模塊分析中，重點介紹了語音的輸入放大和輸出緩沖部分、 ad da轉換、 dsp語音壓縮解壓、外部程序數據存儲器、 cpld邏輯控制、串列收發組件、電源供電以及dsp的jtag介面等等，並且給出了在硬體電路設計和調試過程中的問題與解決辦法。
  19. Finally, on the basis of the mpeg - 1 layer hencoding hardware structure, the block of logic communicates with the pc over the parallel port and the interface for flash memory are design. then a mpeg audio coding system, which applies to store audio signal, is presented through the field programmable gate array device technology

    最後，在mpeg - 1層編碼的硬體結構的基礎上，結合計算機並口通信和flash存儲器的介面模塊，採用現場可編程邏輯器件fpga技術，最終設計了一種應用於音頻信號存儲的mpeg音頻編碼系統。
  20. In order to extract the logic parameter of memory quickly and accurately, we need automatic tools to go on the parameter extraction and library building so as to reduce the man - made influence during the library building process

    為了精確而快速地提取存儲器邏輯參數，我們迫切需要自動化的軟體，盡量減少建庫過程中人為的影響因素，從而能夠自動而快速地完成存儲器的邏輯參數提取和建庫工作。
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