邏輯描述語言 的英文怎麼說

中文拼音 [luómiáoshùyán]
邏輯描述語言 英文
ldl logic description language
  • : Ⅰ動1. (巡察) patrol 2. [書面語] (遮攔) blockⅡ名詞1. (巡察) patrol 2. [書面語] (山溪的邊緣) edge
  • : Ⅰ動詞(編輯; 輯錄) collect; compile; edit Ⅱ名詞(整套書籍、資料的各個部分) part; volume; division
  • : 動詞1. (照底樣畫) copy; depict; trace 2. (在原來顏色淡或需改正之處重復塗抹) retouch; touch up
  • : Ⅰ動詞(陳說; 敘述) state; relate; narrate Ⅱ名詞(姓氏) a surname
  • : 語動詞[書面語] (告訴) tell; inform
  • : Ⅰ名詞1. (話) speech; word 2. (漢語的一個字) character; word 3. (姓氏) a surname Ⅱ動詞(說) say; talk; speak
  • 邏輯 : logic
  • 描述 : describe; represent
  • 語言 : language
  1. The circuits driving the ccd and processing the video signal are implemented by means of cpld ( complex programmable logic device ) and hdl ( hardvvare description language ). the solution to solve the problem of multi - level logical competitive risks that occur in cpld circuits frequently was provided in details in the thesis

    Ccd的驅動電路和視頻信號處理電路採用cpld (可編程器件)和hdl (硬體)實現,文章對cpld電路中容易出現的多級冒險競爭情況作了專門的敘和提出相應的解決方法。
  2. We first present a number of desiderata for an xml - based query language, and based on this criterion, we introduce the syntax of a simple core ian - guage for semistructured data and then describe four extensions that have resulted in working prototypes. second, we present the algorithm for computing the result of a regular expression on data graph with cycles, the first - order interpretation of querying language for semistructured data, and explore structural recursion and bisimulation in semistructured data and propose an efficient and systematic way to computing a bisimulation between the two graphs. we also proposed and implemented a web querying system with database features

    基於這些準則,對一個簡單的半結構數據查詢核心法提出了兩方面擴充;給出了計算數據圖中正規表達式的演算法;對半結構數據查詢的一階、結構遞歸和數據圖的雙態模擬( bisimulation )等問題進行了研究,提出了一種判定數據圖的bisimulation演算法;在xml數據查詢研究的基礎上,設計並實現了一種具有數據庫查詢特性的web查詢系統原型。
  3. The 10th australian joint conference on artificial intelligence, perth, australia, 1997, pp. 38 - 43. 7 he m, leung h f, jennings n r. a fuzzy logic based bidding strategy in continuous double auctions. ieee transactions on knowledge and data engineering, 2003, 15 : 1345 - 1363

    為了祛除關于信息的不現實的假定,對不確定信息進行和推理,在本文中,以概率論為不確定信息的理論基礎,提出了一種新的面向agent的概率程序,它把概率程序和實時程序結合起來。
  4. It is an important character that using hdl describes function and behavior of logic device or system hardware

    使用硬體設計器件及系統硬體的功能和行為是硬體編程設計方法的一個重要特徵。
  5. Because period narrow band signals are the main part of background noises, this thesis uses hardware description language to design a multi - band finite impulse response filter ( fir ) and downloads the program into filed programmable gate array to eliminate the period narrow - band interferences in the background noises

    3 )在現場環境中,背景干擾主要是周期性的窄帶,本文利用硬體( vhdl )設計了一個多帶fir有限沖擊響應濾波器。應用到可編程器件中,消除了背景噪聲中的周期性干擾,為信號的進一步處理提供盡可能幹凈的信號。
  6. As a result, this design accomplishs the function of circuit, which not only can satisfy the high speed image data transmission of large screen system and improve the performance of circuit, but also increase the flexibility of circuit design. in the design, it is possible to act hardware description language procedure according to the practical application demand, instead of revising hardware design of the circuit, which reduce the design cycle and the cost

    所以,本課題運用可編程器件來完成電路功能,不僅能夠滿足大屏幕系統高速圖像數據傳輸對速度的要求,改善了電路性能,而且增加了電路設計的靈活性,設計中可以根據實際應用的需求靈活修改相應硬體程序,而不需要修改電路硬體設計,縮短了設計周期,降低了成本。
  7. To realize nolinear excitation controller, it must be improved that the disposal speed of nolinear excitation control " s signal. with analyzing and comparing all kinds of microcomputer excitation controller, a new microcomputer excitation control scheme is offered that is based on dsp controller while the cpld chip is utilized for realizing the function of pulse trigger. it is described in detail that the method of realizing controllable silicon digital logic by verilog hardware describe language and the designed digital pulse trigger " s veracity was validated by digital simulation

    論文進一步針對非線性勵磁控制要求信號處理速度高、信息量大的特點,在對目前微機勵磁控制器分析基礎上,提出採用dsp控制器晶元作為核心處理器的微機勵磁控制器的解決方案,運用復雜可編程器件cpld晶元實現可控硅同步脈沖觸發單元,並簡要說明了verilog硬體和數字脈沖形成的方法,通過電路數字模擬對所設計的數字觸發單元進行了驗證。
  8. We use temporal logic language xyz / e as our component description language for components may have different abstract hierarchy and different granularity. xyz / e is able to describe the dynamic semantics and static operations of component, and to formally describe system in different hierarchy

    由於構件可能具有不同的抽象層次和粒度,我們採用了時序xyz e作為構件,這種能夠構件的靜態義和動態執行,並且能在不同抽象層次上對系統進行形式化
  9. The authors have formalized a specification language and logic - calculus in lf, together with useful lemmas, and a user - oriented syntax has been designed

    在本文中,我們考慮并行系統的驗證領域,並在lf中將特定論域的規范ccs和相關m - culculus形式化。
  10. Then we explicate the hardware design in details, including implementing ad convert, extending multiple serial communications and external memory, and using cpld do some logic controls. thereby we implement abundance simulation interface, flexible digital interface and serial communication interface. at last we describe the software design, including software design of cpld basing on vhdl and software design of dsp

    本文首先介紹飛行模擬訓練系統的主要組成;接著說明飛控計算機整體系統方案的設計;然後詳細說明飛控計算機硬體平臺的設計,包括ad轉換、多串口通信、外部存儲器的擴展以及採用可編程器件cpld實現電路的控制等幾部分,體現了系統豐富的模擬介面、方便靈活的數字介面和串列通信介面;最後是軟體部分的編程,包括cpld部分的硬體程序設計,和dsp部分相關的程序設計。
  11. Becausc of using the advanced dsp, popu1ar high speed pci bus and laxge scale fpga, using vhdl hardware descriptive language to design the interface logic, the level of designed hardware is to a certain degree

    由於採用了先進的dsp處理晶元和結構、流行的高速總線pci總線、大規模fpga及vhdl硬體進行介面設計,使得本設計的整個系統具有相當的水平。
  12. Because of using the advanced dsp, popular high speed pci bus and large scale fpga, using vhdl hardware descriptive language to design the interface logic, the level of designed hardware is to a certain degree

    由於採用了先進的dsp處理晶元和結構、流行的高速總線pci總線、大規模fpga及vhdl硬體進行介面設計,使得整個系統具有相當高的數據處理能力。
  13. I regard qsim as a kind of constraint satisfaction problem ( csp ), and improve the qualitative simulation algorithm by constraint logic programming ( clp ). fuzzy qualitative simulation develops conventional qsim on several facets, such as representation of qualitative value, state transition rule and filtering algorithms. it bridges the gap between pure qualitative and quantitative, and improve the efficien

    前者是將定性模擬演算法看作一類約束滿足問題,用約束程序加以改進,不僅為解決定性模擬問題提供了框架,而且也是一種規范化的程序;模糊定性模擬演算法則是對純定性模擬演算法在知識、狀態轉移規則、過濾演算法等方面的改進,是一類半定量方法,有利於在定性模擬領域綜合定量信息,同時提高演算法的效率。
  14. This paper first discusses the feature of vhdl, and introduces the process of very long digital system by vhdl and auto - synthesis system with the method of top - down through designing control system of color lamp, reveals that it is very important to design digital system, logic synthesis and emulation with vhdl

    本文介紹了硬體的功能特點,並通過彩燈控制系統的設計過程(給出了模擬結果) ,介紹應用硬體及自動綜合系統以自頂向下的方法進行大規模數字系統設計的過程,揭示了硬體設計數字系統、綜合和模擬等技術在數字系統設計中的重要地位和作用。
  15. So, in this paper, it does the research of the bidirectional conversion between uml and xyz / adl. in this way it combines the oo visual modeling language and formal method based on temporal logic together to describe software architecture, and so to find how to apply the formal method to real software development to promote the research not only on main technologies in software but also on formal method

    基於此,本文開展了對基於時序的軟體體系結構xyz / adl和uml之間的雙向轉換問題的研究,通過研究二者之間的轉換,實現將基於時序的形式化方法與面向對象的可視化建模相結合軟體體系結構,來探討如何將形式化方法應用於實際的軟體開發過程中,這樣不但能促進對當前軟體主流技術的研究,而且能促進對形式化開發方法的研究。
  16. 16 parsons s, giorigini p. an approach to using degrees of belief in bdi agents. information, uncertainty and fusion, kluwer academic publisher, 2000, pp. 81 - 92. 17 parsons s, sierra c, jennings n r. agents that reason and negotiate by arguing

    本文的工作,一方面把我們以前的概率程序擴展到了面向agent的情況進一步的,這種也擴展了hindriks等人的工作,即把面向agent的程序擴展到了面向不確定agent的情況,實現了對于不確定信息的動態的和推理。
  17. In order to make the speed of the function simulation faster, the system adopting vhdl ( very high - speed integrated circuit hardware description language ) to make simulation faster, at the same time this make it easy to transplant the circuit to other kinds of isp chips

    為了提高模擬的速度,對部分電路採用vhdl進行。通過實驗證明,在微波測距儀中採用在系統可編程器件,收到了很好的效果。
  18. According to the basic theory of iir filters, a scheme of hardware implementation is worked out combining with the fact that coefficients of numerator and denominator of transfer function are fixed and the structural feature of selected hdpld. from the clew of implementing a stratified , modularized and parameterized design , the thesis describes the hardware implementation of the iir filter with vhdl and schematic diagram design method. two examples that are iir notch filter and iir low - pass filter are given , the stability of filters and the effects of quantification of coefficient are also analyzed

    以iir數字濾波器的基本理論為依據,結合濾波器的傳遞函數分子、分母系數固定這一事實和選用的高密度可編程器件的特點,確定了iir數字濾波器的硬體實現方案;按照層次化、模塊化、參數化的設計思路,採用vhdl硬體和原理圖兩種設計技術進行了iir濾波器的硬體設計;本文給出了iir陷波濾波器和低通濾波器兩個設計實例,對設計的濾波器都進行了穩定性分析和系數量化影響分析;最終將完成的iir濾波器的硬體設計配置到晶元中,並在製作的實驗電路中進行了實際濾波效果測試。
  19. In this part, the function definition and structure partition are finished, then every part is depicted with verilog hdl. by verilog - xl tools, behavior simulation is achieved. the chip logic function that is encrypting 1024bit data is realized

    在設計的過程中,完成了整體的結構劃分,使用veriloghdl硬體進行了電路的rtl級,並利用了candence公司的verilog - xl完成了軟體平臺上的行為級模擬,實現了1024位數據的加密解密的功能。
  20. On account of actual demand, an ip core of 32bits / 33mhz pci interface module based on fpga has been designed by virtue of vhdl, and the 32 bits microblaze processor soft core has been embedded into this fpga. so, a fast and highly efficient pci master / slave interface, a local processor and other control logic are integrated on one chip of fpga

    根據實際需求,利用vhdl硬體設計了基於fpga的32位/ 33mhz的pci介面模塊的ip核,並內嵌xilinx公司的32位軟處理器核microblaze ,從而在一片fpga上就實現了快速高效的pci主從介面和本地端處理器及其他控制
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