邏輯方陣 的英文怎麼說

中文拼音 [luófāngzhèn]
邏輯方陣 英文
square of opposition
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 方 : Ⅰ名詞1 （方形; 方體） square 2 [數學] （乘方） involution; power 3 （方向） direction 4 （方面） ...
  • 陣 : Ⅰ名詞1 （作戰隊伍的行列或組合方式） battle array [formation]: 布陣 deploy the troops in battle fo...
  • 邏輯 : logic
  • 方陣 : square matrix; matrix; square array方陣列 square array
  1. First, binary texture matrixes of horizontal and vertical direction were constructed in the template and target image, and then the prime matching result of the two directions was calculated according to the alogical xor logical operation in bytes and the final target correlation credibility was obtained by proportion sum at last

    在模板與目標圖像中分別提取水平、垂直方向上的二值化紋理特徵矩陣，然後根據位元組同或邏輯運算分別計算兩個方向上的最佳匹配值，最後，通過加權求和得到最終的目標相關置信度。
  2. By adopting fta ( fault tree analysis ) and minimal path sets theory, the fault information stream analysis of spc - 33 digital governor is made, and from the point of system the ft is constructed. and the fault model with logic matrix in mirror symmetry has been built

    本文運用fta故障樹分析方法和最小路集方法，對spc - 33電子調速器進行故障信息流分析，從系統化角度構築ft ，並建立鏡像對稱的故障邏輯矩陣模型。
  3. Finally, based on the approximation capability of gengeralized multilinear fuzzy logic systems ( gmfls ), a new scheme of decentralized adaptive fuzzy controllers for a class of multiple - input - multiple - output nonlinear systems with a triangular matrix function control structure is proposed

    最後針對一類具有下三角形矩陣函數控制增益的多變量非線性系統，並利用廣義多線性模糊邏輯系統的逼近能力，提出了一種分散自適應模糊控制器設計的新方案。
  4. The system uses the permanent magnet synchronous machine as the driver motor based on the idea of polygonal flux linkage locus and the permanent magnet brush - less motor is as the momentum balance motor by means of speed and current loop in order to track driver motor precisely and rapidly. the harmonious control of driver motor and balance motor is realized by making full use of the dsp hardware resource and complicated programmable logic device. the software design is composed of c and assembly language to realize motor control arithmetic of polygonal flux linkage locus

    衛星天線伺服控制系統以正弦波永磁同步電機作為驅動電機，採用多邊形磁鏈軌跡法（電壓空間矢量法）的控制策略；動量平衡電機採用永磁無刷直流電機，通過電流環、速度環達到快速、精確跟蹤驅動電機的目的，確保了衛星姿態恆定；設計方案中充分利用了dsp硬體資源和復雜邏輯陣列實現了驅動電機和平衡電機的協調控制，並通過c語言和匯編語言的混合編程實現了電機的多邊形磁鏈軌跡控制演算法。
  5. The important part in photoelectric transform circuits is design of driving circuits and signal processing circuits about linear ccd. the time order driving circuit of ccd are designed and debugged with cpld ( complicated programmable logic device ), which make the whole driving circuit ' s volume very small, shorten design period, modify design at any time, and enhance reliability and agility of circuit

    在設計過程中，採用了一種復雜可編程邏輯器件（ cpld ）設計線陣ccd驅動脈沖電路的新方法，只對器件進行重新編程，在不改變任何硬體的情況下，就可以實現驅動器的更新換代，非常適合線陣ccd脈沖產生電路的設計研究，具有高集成度、高可靠性、開發時間短、投資少等優點。
  6. Pld refer to the programmable logic device. it is a kind of chip that can be written the design of integrated circuits into its logic arrays

    Pld是指可編程邏輯器件，是一種可將集成電路的設計用編程的方式寫入到其邏輯陣列結構中的一種晶元。
  7. In the constructing of the diagnosis module using the technology of the combination of the fuzzy logic and neural network, which based on the fuzzy adaptive learning control network, a simple kind of capable method for consummate the structure and performance of network is introduced, which includes the rules extraction based on the maximum weights matrix and the parameters amendment based on genetic algorithm by floating - point coding. during the monitoring of the parts condition, the output of the condition monitoring system shows the good working condition of the executing agency by fuzzily deducing from the control instruction send by the auv ' s controller and motion status, and so offers the proof to complete mission and return safely

    在珍斷模塊建模中採用模糊邏輯與神經網路結合的技術，以模糊自適應學習控制網路為核心，提出了一種簡單可行的基於最大權值矩陣的規則提取及基於浮點數編碼的遺傳演算法的參數調整的，完善網路結構與性能的方法，並在狀態監測過程中，通過對由控制器輸入的水下機器人運動控制量以及運行狀態的模糊推理，得到執行部件（推進器或舵）的工作狀態優劣程度，為保證水下機器人完成任務，安全返回提供控制依據。
  8. Then studis on new models and new approaches based on boolean process in delay automation are made. analytical delay model is improved with the new concept of sensitization, based on which delay matrix is proposed to describe the delay of circuit modules. then introducing hierarchical delay analysis methods into delay matrix analysis, a novel exact hierarchical delay ananlysis method is presented

    在組合邏輯電路精確定時方面，本文用波形多項式偏導定義的敏化概念改進了解析延時模型，在此基礎上建立了基於敏化的延時矩陣以描述電路模塊的延時，隨后將層次化延時分析方法引入基於延時矩陣的延時分析中，形成一種新的精確的通用電路層次化延時分析方法。
  9. This course consists of lectures and labs on digital logic, flipflops, pals, counters, timing, synchronization, finite - state machines, and microprogrammed systems

    本課包括了數字邏輯、觸發器、 pal （可編程邏輯陣列） 、計數器、時序、同步、有限狀態機、和微控制系統方面的講課與實驗。
  10. And then, aiming at the deficiency of conventional design, the high - compositive fpga ( filed programmable gate array ) chip is used as the core in this project to deal with the signal of six encoders in real time

    其次針對以往設計的不足，採用了以高度集成的fpga （現場可編程邏輯陣列）晶元為核心的設計方式，實現六路光電編碼器信號的同步實時處理。
  11. To predigest deployment and optimization process, correlation matrix method was put forward based on mfd logic on the premise of ignoring self - correlation between maintenance techniques

    為簡化配置優化過程，在忽略各維護技術方法之間的自相關關系前提下，基於維護功能配置邏輯，提出了相關矩陣法。
  12. Dbf algorithms for 2d planar array based on the algorithms for 1d array are discussed in this paper. the author ' s main contributions include research of the adaptive digital beamforming algorithm, which control both amplitude and phase of each array element : diagonal loading qrd - smi algorithm. research of two phase - only dbf algorithms : small phase perturbation restriction algorithm and maximum gain of the expected direction restriction algorithm

    面陣的數字波束形成演算法是面陣dbf技術的關鍵，本文在現有的一維數字波束形成演算法基礎上，研究了二維面陣的數字波束形成演算法，主要工作有：面陣的幅度相位全控制自適應數字波束形成演算法? ?對角加載qrd - smi演算法的研究；兩種面陣唯相位（ phase - only ）數字波束形成演算法? ?小相位擾動約束演算法和期望方向增益最大約束演算法的研究；面陣的數字多波束形成演算法? ?二維fft多波束的研究，以及fft在可編程邏輯器件中的實現。
  13. On one hand, we improve on one of the existed algorithms which named attribute reduction algorithm based on discernility matrix and logic operation. we propose a new transformation method from conjunction matrix to disjunction matrix that avoids the manual work or global search and can save the time and space. on the other hand, most traditional methods didn ’ t integrate with database operations

    主要做了兩方面的工作，一方面，對已有的基於可辨識矩陣和邏輯運算的屬性約簡演算法進行了改進，提出了一種從合取項矩陣到析取項矩陣直接轉化的方法，避免了傳統的人工轉化或全局搜索的方法，節省了空間和時間。
  14. The latest usb2. 0 supports high - speed up to 480mbps. additionally fpga users can conveniently not only design the hardware logic required, but re - program and re - configure

    而現場可編程門陣列器件（ fpga ）是一種可以進行重編程和重配置的晶元，可以方便地設計出所需的硬體邏輯。
  15. Changing operations on the fly ? converting, say, a calculation of a matrix of numbers to a parallel - processing computation ? requires the relatively slow rewiring of connections between large blocks of transistors, not the individual elements ( gates ) that perform a processor ' s logic operations

    若要以動態的方式改變操作（例如將數字矩陣的計算轉換為平行計算） ，得將大區塊電晶體間的連結緩慢地重新接線，而非直接改變處理器里執行邏輯運算的個別元件（邏輯閘） 。
  16. There are many encryption algorithms. even for one algorithm, rsa, for example, the architectures of different modular length rsa are not same. the dissertation focuses on the research and design of the reconfiguration in the encryption application using fpga

    在現場可編程邏輯陣列fpga上，實現多種加密演算法以及不同長度密鑰的rsa演算法的可重構，在目前對開展可重構計算技術在加密方面的應用基礎研究和研發有自主版權的加密硬體技術有一定的意義。
  17. For the high - speed digital signal processing, the structure of fpga and dsp is widespreadly adopted. dsp is more featured in the implementation of complicated algorithm, while field programming gate array ( fpga ) shows more advantage in its flexibility of design, simplicity of system configuration, modification and maintenance. in the paper, the hardware system of the spaceborne radar is based on the structure of fpga and dsp, of which the signal processing part is accomplished with one fpga chip and multi dsps

    Dsp適合完成結構復雜的演算法;現場可編程邏輯陣列（ fpga ）適合完成高效、演算法固定的任務;與專用集成電路（ asic ）相比， fpga優點主要在於其很強的靈活性、可在線配置、修改和維護方便等優點。本文工程中的星載雷達信號處理和控制系統就是採用dsp + fpga的方式。其中信號處理採用的是xilinx公司的virtex -和virtex系列fpga和多片analogdevices公司的tigersharcts101的硬體電路結構。
  18. This thesis is concerned with fault detection and isolation problem for dynamic systems such as norm - bounded uncertain systems, state - delayed uncertain systems, linear parameter - varying systems with time delays, time - delay systems with markovian jump parameters and nonlinear systems by using fault detection filter, threshold selection method and linear matrix inequalities

    本論文研究了動態系統的魯棒故障檢測與分離問題，基於故障檢測濾波器和閾值邏輯方法，採用線性矩陣不等式技術，研究了范數有界不確定系統、時滯不確定系統、時滯lpv系統、時滯馬爾可夫跳躍系統、非線性系統的魯棒故障檢測與分離問題。
  19. Based on the requirement of the data storage of aerospace craft, the purpose of this dissertation is to study the high speed solid - state storage technique interface logic with compactflash card array. the design scheme of a suit of high speed solid - state storage system used with ti " tms320vc5402, lattice " isplsi 3448 and sandisk compacflash card are expatiated. in addition, the paper also gives the material realization scheme of the experiment circuit and interface logic simulation analyzing

    本論文以高速cf卡陣列固態存儲技術的介面設計為主要內容，闡述了利用ti公司的tms320vc5402 、 lattice公司的isplsi3448 、 sandisk公司的compactflashcard等組成的高速cf卡陣列固態存儲系統的設計方案，並給出了實驗電路實現方案和介面邏輯的模擬分析。
  20. When calculate the correlation function of binary array pairs, using the boolean calculation instead of the decimal multiplication, using the method of count the number of 1 in binary integer to calculate the correlation function of binary array pairs, the speed of searching is obviously improved by these methods. by the algorithm introduced in this paper, the constant weight and normative perfect binary array pairs whose volume from 4 to 28 and quasi - perfect binary array pairs whose volume from 2 to 24 were searched and gi ved the new result

    此外，採用二進制整數來表示陣列，通過對整數的邏輯運算來實現陣列偶的移位變換、完全采樣變換等運算；在計算二進陣列偶的相關函數時，用整數的邏輯運算代替十進制中的乘法運算，並用計算二進制整數中1的個數的方法來計算二進陣列偶的相關函數，以上方法的採用明顯地提高了搜索速度。利用上述演算法，對體積為4 28的等重規范型最佳二進陣列偶和體積為2 24的準最佳二進陣列偶進行了搜索，並給出了新的結果。
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