邏輯電路板 的英文怎麼說

中文拼音 [luódiànlùbǎn]
邏輯電路板 英文
logic card
  • 邏 : Ⅰ動1. （巡察） patrol 2. [書面語] （遮攔） blockⅡ名詞1. （巡察） patrol 2. [書面語] （山溪的邊緣） edge
  • 輯 : Ⅰ動詞（編輯; 輯錄） collect; compile; edit Ⅱ名詞（整套書籍、資料的各個部分） part; volume; division
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 板 : Ⅰ名詞1 （片狀硬物體） board; plank; plate 2 （專指店鋪的門板） shutter 3 [音樂] （打拍子的樂器） ...
  • 邏輯 : logic
  • 電路板 : accessory board
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga

    本課題主要針對星載并行計算機體系結構及軟體結構的特點，從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究，提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究，提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略，同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術，提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案，實現該方案所需增加的電路少，可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。
  2. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中，本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信，同時系統電路配置成中斷響應方式，這樣既滿足了系統要求，又充分利用了tms320f2812的硬體資源。在軟體設計中，本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  3. Secondly, the composition and function of expander board is introduced, the paper describes a detail developing process of selecting component, design interface circuit, protract pcb with protel and design pci interface logic and user ' s logic. with ahdl and max + plus. in addition this paper discusses how to debug pci board, and give the simulation waveform and the result of debug. on the base of all functions is ture, this paper introduce the config registers and memory of bu - 61580, realize the interrupt function and communication based on mil - std - 1553b

    首先分析了擴展板的組成、功能，對pci介面邏輯和擴展板的內部邏輯進行詳細設計，並根據其資源要求進行器件選擇，然後使用protel工具進行電路板的製作。另外，本文還介紹了擴展板的調試方法，給出了邏輯模擬波形和調試結果。在此基礎上，本文闡述了協議晶元的配置方法，實現了1553b通訊擴展板間的通訊及中斷功能，達到了開發技術指標。
  4. When those ptvs are sequentially loaded to cut ( circuit under test ) from intelligent fault diagnosis system, homologous prvs ( parallel response vector ) are taken back. through test response analysis by expert system, intelligent fault diagnosis system can detect all fixed ' 1 ' logic fault, fixed ' 0 ' logic fault, and detect the majority of multi - line short circuit fault

    當這些ptvs從pc機中依次加載到被測電路板后，相應的prvs （并行響應向量集）可以獲取供診斷系統進行測試響應分析，從而檢測出固定邏輯故障和橋接故障。
  5. Describes the design and realization of partial run - time reconfigurable fpga in detail. in order to reduce the affect of the reconfiguration time on system execution time, mostly static circuit design method in logical design stage and incremental routing method in component implementation stage are proposed. the fft parallel processing algorithm is examined through vvp platform

    本章詳細闡述了基於vvp平臺的多sharc功能插板的具體硬體實現，以動態重構fpga設計為核心，論述了局部動態重構fpga設計流程和方法，提出了極大靜態電路邏輯設計方法和遞增式布線方法，以達到減小動態重配置時間，提高系統運行效率的目的。
  6. The concrete steps include the design of schematic, the design and optimization of printed circuit board, the manufacture and debugging of hardware, the program and debugging of eprom software, the design and embedding gal devices

    具體過程包括設計通信卡的原理圖；設計和優化印刷電路板圖；硬體製作和調試；編寫及調試eprom程序；設計及燒寫gal器件邏輯等。
  7. To reduce the size and increase the reliability of the control card, lattice company ? isplsi chip is used to realize the digital logic circuit. its insystem programmable ability makes it easy to realize the design of digital logic circuit

    6軸伺服控制卡上，使用lattice公司的isplsi器件實現數字邏輯電路設計，降低了板卡的設計尺寸，增加了電路板的可靠性和設計靈活性。
  8. 1. a small and cheap 8 - bit microcontroller is used as control core. all components of the sensor, some of which are necessary for the multiple and intelligent functions, are selected ones with low cost and small package. by designing all auxiliary logic circuits in a complex programmable logic device ( cpld ), and integrating all analog circuits in an application specific ic ( asic ), the size of pcb board is greatly reduced, which make it possible that the pcb can be installed with the displacement detector together

    系統採用小型廉價8位微控制器控制，電路內配置了為實現多功能智能化所必需的硬體，並全部採用低價格、小體積器件，還將所有輔助邏輯電路設計在一片復雜可編程邏輯器件cpld內，所有模擬電路集成於一片專用集成電路asic內，大大縮小了電路板尺寸，再與傳感元件組裝在一起，從而使整個系統在保證智能化功能的前提下，具有體積小、成本低、一體化和抗干擾能力強的特點。
  9. Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function

    本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。
  10. In addition, some interface circuits, such as high - power d / a card, filter board, logic - process board and the feature of cvi programming language and windows programming are also introduced in detail with some chapters

    後面章節詳細介紹了系統的一些介面和控制電路，如大功率數模轉換板、濾波器、控制邏輯處理器等等，以及cvi工業控制軟體開發環境及windows編程等軟體方面的內容。
  11. 2. by analyzing the partial discharge signals and the interferences and using high - speed filed programmable gate array ( fpga ) and digital signal processor ( dsp ), a hardware and print circuit board have been designed 3

    2 ）通過對局部放電和干擾的分析，針對局部放電信號實時處理的要求，利用高速的現場可編程邏輯器件和數字信號處理器完成了信號處理的硬體電路板的設計與製作。
  12. The thesis includes the design of hard circuit, pcb ( printed circuit board ), driver and application soft involving a / d board and d / a board. the detailed functional modules consist of multiplex signals select module 、 analog digital conversion module 、 digital analog conversion module 、 pci protocol conversion module 、 driver and magnifying module 、 control logic 、 clock circuit and configuration circuit. the importance of the thesis is a / d board

    本課題包括硬體電路、印刷電路板（ pcb ） 、驅動程序和應用軟體的設計，涉及a / d板和d / a板兩大塊部分，具體的功能模塊包括多路信號選擇模塊、模數轉換模塊、數模轉換模塊、 pci協議轉換模塊、驅動放大模塊、控制邏輯、時鐘電路和配置電路，其中重點是a / d板部分。
  13. Designer can synthesize the pci core and the user ' s logic into an fpga chip, and can do simulation analysis to test the pci core and the user ' s logic. this technique can increase the design and debugging time, develop the capability of the system

    設計者可以將pci用戶邏輯與pcicore集成在一片fpga里，並且可以在頂層通過模擬來驗證pci介面以及用戶邏輯設計的正確與否，這樣可以大幅度提高調試速度，縮短開發周期，提高電路板的集成度和系統的性能。
  14. Its driver control logic was realized by means of digital integrated circuit in which the pld chips utilized as the carrier. the vhdl, which is the ieee standard design language of integrated circuit, is used as the behavior description language. the compilation, synthesis, simulation and programming are fulfilled in the maxplusii

    設計的重點是驅動板，其驅動控制邏輯以pld晶元為載體通過數字集成電路方式實現，控制邏輯的功能設計是用ieee標準的集成電路設計語言vhdl作為行為描述語言，在maxplus武漢科技大學碩士學位論文環境中進行編譯、綜合、模擬和晶元編程。
  15. This technique is considered as the future trend of instrument technology. the virtual instrument is one of computer instrument systems and it is based on the hardware of computer. the function of virtual instrument is defined and designed by consumer. the virtual instrument is with virtual panel and the testing function is implemented by software. the traditional instrument implements data analyzing, data processing and data display by hardware circuit, but the virtual instrument implements those functions by computers. though the collection of signal is done by the actual probe, data collection board and the i / o of computer. the virtual logical analyzer is made by the technology of virtual instrument

    所謂虛擬儀器，就是在以計算機為核心的硬體平臺上，其功能由用戶設計和定義，具有虛擬面板，其測試功能由測試軟體實現的一種計算機儀器系統。它將傳統儀器由硬體電路實現的數據分析、處理與顯示功能，改由功能強大的計算機來執行，而信號的採集，仍然利用實際的探針，數據採集板和計算機i / o系統相結合的思想。虛擬邏輯分析儀就是按照虛擬儀器思想設計而成的。
  16. With the fast development of the field programmable gate arrays ( fpga ), the pci ipcore has been offered by a great many manufactories, and then the engineers can integrate the users ’ logic and pci ipcore into the fpga chip, thus the simulations and the verifications of the user ’ logic can be done in the top level. so the engineers can develop pci productions with using ipcore much faster than using special chip of pci interface, and also can shorten debug periods, highly advance the integration of the pcb board

    隨著fpga （現場可編程門陣列）技術的快速發展，很多製造廠商都開始提供pci介面核邏輯（ ipcore ） ，設計者可以將pci用戶邏輯和pci核邏輯集成到fpga裏面，並且可以在頂層通過模擬來驗證pci介面以及用戶邏輯設計的正確與否，這樣較之使用那些pci專用介面晶元，使用ipcore就可以大幅度的提高調試速度，縮短開發周期，提高電路板的集成度和系統的性能。
  17. With the aid of the design thoughts of other flat panel displays, a control circuit is designed firstly, which can be applied on small scale of oled, and does a hardware implementation based on programmable logic device

    我們在參考其他平板顯示器驅動控制電路的基礎上，提出了應用於oled驅動的控制電路方案，同時利用復雜可編程邏輯器件進行了驗證，並對此電路進行了模擬。
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